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| author | Fernando Sahmkow <fsahmkow27@gmail.com> | 2019-02-15 13:15:28 -0400 | 
|---|---|---|
| committer | FernandoS27 <fsahmkow27@gmail.com> | 2019-02-15 22:55:29 -0400 | 
| commit | 5b7ec71fb7cc81ea0f98f019cb0dac0b6bcb2fa2 (patch) | |
| tree | f4bd6af64dd1200dd12a4dd9e55f4920b8a8a8cf | |
| parent | 99da6362c43a24c608a2790f668f10a62e3b80a6 (diff) | |
Correct CNTPCT to use Clock Cycles instead of Cpu Cycles.
| -rw-r--r-- | src/core/arm/dynarmic/arm_dynarmic.cpp | 5 | ||||
| -rw-r--r-- | src/core/core_timing_util.cpp | 7 | ||||
| -rw-r--r-- | src/core/core_timing_util.h | 3 | 
3 files changed, 13 insertions, 2 deletions
| diff --git a/src/core/arm/dynarmic/arm_dynarmic.cpp b/src/core/arm/dynarmic/arm_dynarmic.cpp index 9b7ca4030..d36538257 100644 --- a/src/core/arm/dynarmic/arm_dynarmic.cpp +++ b/src/core/arm/dynarmic/arm_dynarmic.cpp @@ -12,6 +12,7 @@  #include "core/core.h"  #include "core/core_cpu.h"  #include "core/core_timing.h" +#include "core/core_timing_util.h"  #include "core/gdbstub/gdbstub.h"  #include "core/hle/kernel/process.h"  #include "core/hle/kernel/svc.h" @@ -119,7 +120,7 @@ public:          return std::max(parent.core_timing.GetDowncount(), 0);      }      u64 GetCNTPCT() override { -        return parent.core_timing.GetTicks(); +        return CpuCyclesToClockCycles(parent.core_timing.GetTicks());      }      ARM_Dynarmic& parent; @@ -151,7 +152,7 @@ std::unique_ptr<Dynarmic::A64::Jit> ARM_Dynarmic::MakeJit() const {      config.tpidr_el0 = &cb->tpidr_el0;      config.dczid_el0 = 4;      config.ctr_el0 = 0x8444c004; -    config.cntfrq_el0 = 19200000; // Value from fusee. +    config.cntfrq_el0 = Timing::CNTFREQ; // Value from fusee.      // Unpredictable instructions      config.define_unpredictable_behaviour = true; diff --git a/src/core/core_timing_util.cpp b/src/core/core_timing_util.cpp index 88ff70233..8fc92560a 100644 --- a/src/core/core_timing_util.cpp +++ b/src/core/core_timing_util.cpp @@ -60,4 +60,11 @@ s64 nsToCycles(u64 ns) {      return (BASE_CLOCK_RATE * static_cast<s64>(ns)) / 1000000000;  } +u64 CpuCyclesToClockCycles(u64 ticks) { +    u64 result = ticks; +    result *= CNTFREQ; +    result /= BASE_CLOCK_RATE; +    return static_cast<u64>(result); +} +  } // namespace Core::Timing diff --git a/src/core/core_timing_util.h b/src/core/core_timing_util.h index 513cfac1b..545d3a260 100644 --- a/src/core/core_timing_util.h +++ b/src/core/core_timing_util.h @@ -11,6 +11,7 @@ namespace Core::Timing {  // The below clock rate is based on Switch's clockspeed being widely known as 1.020GHz  // The exact value used is of course unverified.  constexpr u64 BASE_CLOCK_RATE = 1019215872; // Switch clock speed is 1020MHz un/docked +constexpr u64 CNTFREQ = 19200000;  // Value from fusee.  inline s64 msToCycles(int ms) {      // since ms is int there is no way to overflow @@ -61,4 +62,6 @@ inline u64 cyclesToMs(s64 cycles) {      return cycles * 1000 / BASE_CLOCK_RATE;  } +u64 CpuCyclesToClockCycles(u64 ticks); +  } // namespace Core::Timing | 
