diff options
author | bunnei <bunneidev@gmail.com> | 2020-12-30 23:38:49 -0800 |
---|---|---|
committer | bunnei <bunneidev@gmail.com> | 2021-01-28 21:42:25 -0800 |
commit | 9a4e148f9e27671f58f0d32afb2c9a85adc136c5 (patch) | |
tree | 71ef149bbc52000e53e3be90c15629538a18f82f | |
parent | c0d3aef28c0a0c68c18de30228f29e30f0e52533 (diff) |
arm: arm_dynarmic: Skip calls when JIT is invalid.
- This can happen if called from an idle or suspension thread.
-rw-r--r-- | src/core/arm/dynarmic/arm_dynarmic_32.cpp | 12 | ||||
-rw-r--r-- | src/core/arm/dynarmic/arm_dynarmic_64.cpp | 12 |
2 files changed, 24 insertions, 0 deletions
diff --git a/src/core/arm/dynarmic/arm_dynarmic_32.cpp b/src/core/arm/dynarmic/arm_dynarmic_32.cpp index 6c4c8e9e4..7d7e191ea 100644 --- a/src/core/arm/dynarmic/arm_dynarmic_32.cpp +++ b/src/core/arm/dynarmic/arm_dynarmic_32.cpp @@ -251,10 +251,16 @@ void ARM_Dynarmic_32::SetTPIDR_EL0(u64 value) { } void ARM_Dynarmic_32::ChangeProcessorID(std::size_t new_core_id) { + if (!jit) { + return; + } jit->ChangeProcessorID(new_core_id); } void ARM_Dynarmic_32::SaveContext(ThreadContext32& ctx) { + if (!jit) { + return; + } Dynarmic::A32::Context context; jit->SaveContext(context); ctx.cpu_registers = context.Regs(); @@ -264,6 +270,9 @@ void ARM_Dynarmic_32::SaveContext(ThreadContext32& ctx) { } void ARM_Dynarmic_32::LoadContext(const ThreadContext32& ctx) { + if (!jit) { + return; + } Dynarmic::A32::Context context; context.Regs() = ctx.cpu_registers; context.ExtRegs() = ctx.extension_registers; @@ -273,6 +282,9 @@ void ARM_Dynarmic_32::LoadContext(const ThreadContext32& ctx) { } void ARM_Dynarmic_32::PrepareReschedule() { + if (!jit) { + return; + } jit->HaltExecution(); } diff --git a/src/core/arm/dynarmic/arm_dynarmic_64.cpp b/src/core/arm/dynarmic/arm_dynarmic_64.cpp index 4c5ebca22..f755a39cf 100644 --- a/src/core/arm/dynarmic/arm_dynarmic_64.cpp +++ b/src/core/arm/dynarmic/arm_dynarmic_64.cpp @@ -290,10 +290,16 @@ void ARM_Dynarmic_64::SetTPIDR_EL0(u64 value) { } void ARM_Dynarmic_64::ChangeProcessorID(std::size_t new_core_id) { + if (!jit) { + return; + } jit->ChangeProcessorID(new_core_id); } void ARM_Dynarmic_64::SaveContext(ThreadContext64& ctx) { + if (!jit) { + return; + } ctx.cpu_registers = jit->GetRegisters(); ctx.sp = jit->GetSP(); ctx.pc = jit->GetPC(); @@ -305,6 +311,9 @@ void ARM_Dynarmic_64::SaveContext(ThreadContext64& ctx) { } void ARM_Dynarmic_64::LoadContext(const ThreadContext64& ctx) { + if (!jit) { + return; + } jit->SetRegisters(ctx.cpu_registers); jit->SetSP(ctx.sp); jit->SetPC(ctx.pc); @@ -316,6 +325,9 @@ void ARM_Dynarmic_64::LoadContext(const ThreadContext64& ctx) { } void ARM_Dynarmic_64::PrepareReschedule() { + if (!jit) { + return; + } jit->HaltExecution(); } |