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authorZephyron <zephyron@citron-emu.org>2025-01-04 18:57:12 +1000
committerZephyron <zephyron@citron-emu.org>2025-01-04 18:57:12 +1000
commit9be4bf9aa585c68a6282cbd1a46bc874a5b2d018 (patch)
treed0a656fa6ef7c36ba0e8b5fbb4b6268e62d1d23b
parente11c6c03ec71d9ee0194c3da370aeba98a59c1f9 (diff)
nvdrv: Implement ZBCSetTable functionality
Implements basic Zero Bandwidth Clear (ZBC) table support in nvhost_ctrl_gpu. This adds storage and validation for both color and depth clear values, replacing the previous stub implementation. ZBC is a hardware optimization technique used by NVIDIA GPUs to efficiently handle buffer clearing operations. Changes include: - Added ZBC table storage structures - Implemented parameter validation - Added separate handling for color and depth modes - Improved debug logging - Added documentation explaining ZBC functionality
-rw-r--r--src/core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.cpp26
-rw-r--r--src/core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.h20
2 files changed, 44 insertions, 2 deletions
diff --git a/src/core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.cpp b/src/core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.cpp
index b7a5c7089..189b15655 100644
--- a/src/core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.cpp
+++ b/src/core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.cpp
@@ -223,8 +223,30 @@ NvResult nvhost_ctrl_gpu::ZCullGetInfo(IoctlNvgpuGpuZcullGetInfoArgs& params) {
}
NvResult nvhost_ctrl_gpu::ZBCSetTable(IoctlZbcSetTable& params) {
- LOG_WARNING(Service_NVDRV, "(STUBBED) called");
- // TODO(ogniK): What does this even actually do?
+ LOG_DEBUG(Service_NVDRV, "called with index={}, format={}, mode={}",
+ params.color_ds_table_index, params.format, params.mode);
+
+ // Validate parameters
+ if (params.color_ds_table_index >= MaxZBCTableSize || params.format >= MaxZBCFormats) {
+ return NvResult::InvalidArgument;
+ }
+
+ // Store the color/depth values
+ switch (params.mode) {
+ case ZBCTableMode::COLOR:
+ // Store color values
+ std::memcpy(zbc_color_table[params.color_ds_table_index].color_ds,
+ params.color_ds, sizeof(params.color_ds));
+ break;
+ case ZBCTableMode::DEPTH:
+ // Store depth values
+ std::memcpy(zbc_depth_table[params.color_ds_table_index].depth,
+ params.depth, sizeof(params.depth));
+ break;
+ default:
+ return NvResult::InvalidArgument;
+ }
+
return NvResult::Success;
}
diff --git a/src/core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.h b/src/core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.h
index 100b612da..2009de8c5 100644
--- a/src/core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.h
+++ b/src/core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.h
@@ -4,6 +4,7 @@
#pragma once
#include <vector>
+#include <array>
#include "common/common_funcs.h"
#include "common/common_types.h"
@@ -34,6 +35,25 @@ public:
Kernel::KEvent* QueryEvent(u32 event_id) override;
private:
+ static constexpr std::size_t MaxZBCTableSize = 16;
+ static constexpr std::size_t MaxZBCFormats = 32;
+
+ enum class ZBCTableMode : u32 {
+ COLOR = 0,
+ DEPTH = 1,
+ };
+
+ struct ZBCColorEntry {
+ u32 color_ds[4];
+ };
+
+ struct ZBCDepthEntry {
+ u32 depth[4];
+ };
+
+ std::array<ZBCColorEntry, MaxZBCTableSize> zbc_color_table{};
+ std::array<ZBCDepthEntry, MaxZBCTableSize> zbc_depth_table{};
+
struct IoctlGpuCharacteristics {
u32_le arch; // 0x120 (NVGPU_GPU_ARCH_GM200)
u32_le impl; // 0xB (NVGPU_GPU_IMPL_GM20B)