diff options
| author | Subv <subv2112@gmail.com> | 2018-01-10 00:58:25 -0500 |
|---|---|---|
| committer | Subv <subv2112@gmail.com> | 2018-01-10 01:01:55 -0500 |
| commit | 7ad20154fc9bf1094f78721fed13fac1436bef17 (patch) | |
| tree | 7c49bbaee40560ffac1a0a5f8a869df23f0dba71 /src/citra_qt/debugger/wait_tree.cpp | |
| parent | 188feba4576d0ff3e930767cefb27ac9af2b716f (diff) | |
Threads: Added enum values for the Switch's 4 cpu cores and implemented svcGetInfo(AllowedCpuIdBitmask)
Diffstat (limited to 'src/citra_qt/debugger/wait_tree.cpp')
| -rw-r--r-- | src/citra_qt/debugger/wait_tree.cpp | 9 |
1 files changed, 3 insertions, 6 deletions
diff --git a/src/citra_qt/debugger/wait_tree.cpp b/src/citra_qt/debugger/wait_tree.cpp index cd03a6554..c066a3e17 100644 --- a/src/citra_qt/debugger/wait_tree.cpp +++ b/src/citra_qt/debugger/wait_tree.cpp @@ -205,14 +205,11 @@ std::vector<std::unique_ptr<WaitTreeItem>> WaitTreeThread::GetChildren() const { case ThreadProcessorId::THREADPROCESSORID_DEFAULT: processor = tr("default"); break; - case ThreadProcessorId::THREADPROCESSORID_ALL: - processor = tr("all"); - break; case ThreadProcessorId::THREADPROCESSORID_0: - processor = tr("AppCore"); - break; case ThreadProcessorId::THREADPROCESSORID_1: - processor = tr("SysCore"); + case ThreadProcessorId::THREADPROCESSORID_2: + case ThreadProcessorId::THREADPROCESSORID_3: + processor = tr("core %1").arg(thread.processor_id); break; default: processor = tr("Unknown processor %1").arg(thread.processor_id); |