diff options
author | Markus Wick <markus@selfnet.de> | 2021-05-27 22:54:22 +0200 |
---|---|---|
committer | Markus Wick <markus@selfnet.de> | 2021-05-27 23:23:23 +0200 |
commit | 3d2e80daed4981b8f92604568b63c217fa587ad6 (patch) | |
tree | 89938c90a246c49254c4f2b97f9aef9cd0b9b336 /src/core/arm | |
parent | 9110cfdefb2085d956c430df78dd4e694eca0728 (diff) |
core/arm_interface: Call SVC after end of dynarmic block.
So we can modify all of dynarmic states within SVC without ExceptionalExit.
Especially as the ExceptionalExit hack is dropped on upstream dynarmic.
Diffstat (limited to 'src/core/arm')
-rw-r--r-- | src/core/arm/arm_interface.h | 3 | ||||
-rw-r--r-- | src/core/arm/dynarmic/arm_dynarmic_32.cpp | 21 | ||||
-rw-r--r-- | src/core/arm/dynarmic/arm_dynarmic_32.h | 7 | ||||
-rw-r--r-- | src/core/arm/dynarmic/arm_dynarmic_64.cpp | 21 | ||||
-rw-r--r-- | src/core/arm/dynarmic/arm_dynarmic_64.h | 7 |
5 files changed, 42 insertions, 17 deletions
diff --git a/src/core/arm/arm_interface.h b/src/core/arm/arm_interface.h index 77094b48f..689e3ceb5 100644 --- a/src/core/arm/arm_interface.h +++ b/src/core/arm/arm_interface.h @@ -65,9 +65,6 @@ public: /// Step CPU by one instruction virtual void Step() = 0; - /// Exits execution from a callback, the callback must rewind the stack - virtual void ExceptionalExit() = 0; - /// Clear all instruction cache virtual void ClearInstructionCache() = 0; diff --git a/src/core/arm/dynarmic/arm_dynarmic_32.cpp b/src/core/arm/dynarmic/arm_dynarmic_32.cpp index e401fa825..50dc82382 100644 --- a/src/core/arm/dynarmic/arm_dynarmic_32.cpp +++ b/src/core/arm/dynarmic/arm_dynarmic_32.cpp @@ -78,7 +78,9 @@ public: } void CallSVC(u32 swi) override { - Kernel::Svc::Call(parent.system, swi); + parent.svc_called = true; + parent.svc_swi = swi; + parent.jit->HaltExecution(); } void AddTicks(u64 ticks) override { @@ -187,11 +189,17 @@ std::shared_ptr<Dynarmic::A32::Jit> ARM_Dynarmic_32::MakeJit(Common::PageTable* } void ARM_Dynarmic_32::Run() { - jit->Run(); -} - -void ARM_Dynarmic_32::ExceptionalExit() { - jit->ExceptionalExit(); + while (true) { + jit->Run(); + if (!svc_called) { + break; + } + svc_called = false; + Kernel::Svc::Call(system, svc_swi); + if (shutdown) { + break; + } + } } void ARM_Dynarmic_32::Step() { @@ -275,6 +283,7 @@ void ARM_Dynarmic_32::LoadContext(const ThreadContext32& ctx) { void ARM_Dynarmic_32::PrepareReschedule() { jit->HaltExecution(); + shutdown = true; } void ARM_Dynarmic_32::ClearInstructionCache() { diff --git a/src/core/arm/dynarmic/arm_dynarmic_32.h b/src/core/arm/dynarmic/arm_dynarmic_32.h index b882b0c59..fa6f4f430 100644 --- a/src/core/arm/dynarmic/arm_dynarmic_32.h +++ b/src/core/arm/dynarmic/arm_dynarmic_32.h @@ -42,7 +42,6 @@ public: u32 GetPSTATE() const override; void SetPSTATE(u32 pstate) override; void Run() override; - void ExceptionalExit() override; void Step() override; VAddr GetTlsAddress() const override; void SetTlsAddress(VAddr address) override; @@ -82,6 +81,12 @@ private: std::size_t core_index; DynarmicExclusiveMonitor& exclusive_monitor; std::shared_ptr<Dynarmic::A32::Jit> jit; + + // SVC callback + u32 svc_swi{}; + bool svc_called{}; + + bool shutdown{}; }; } // namespace Core diff --git a/src/core/arm/dynarmic/arm_dynarmic_64.cpp b/src/core/arm/dynarmic/arm_dynarmic_64.cpp index 157051d69..4f5a58b38 100644 --- a/src/core/arm/dynarmic/arm_dynarmic_64.cpp +++ b/src/core/arm/dynarmic/arm_dynarmic_64.cpp @@ -102,7 +102,9 @@ public: } void CallSVC(u32 swi) override { - Kernel::Svc::Call(parent.system, swi); + parent.svc_called = true; + parent.svc_swi = swi; + parent.jit->HaltExecution(); } void AddTicks(u64 ticks) override { @@ -227,11 +229,17 @@ std::shared_ptr<Dynarmic::A64::Jit> ARM_Dynarmic_64::MakeJit(Common::PageTable* } void ARM_Dynarmic_64::Run() { - jit->Run(); -} - -void ARM_Dynarmic_64::ExceptionalExit() { - jit->ExceptionalExit(); + while (true) { + jit->Run(); + if (!svc_called) { + break; + } + svc_called = false; + Kernel::Svc::Call(system, svc_swi); + if (shutdown) { + break; + } + } } void ARM_Dynarmic_64::Step() { @@ -320,6 +328,7 @@ void ARM_Dynarmic_64::LoadContext(const ThreadContext64& ctx) { void ARM_Dynarmic_64::PrepareReschedule() { jit->HaltExecution(); + shutdown = true; } void ARM_Dynarmic_64::ClearInstructionCache() { diff --git a/src/core/arm/dynarmic/arm_dynarmic_64.h b/src/core/arm/dynarmic/arm_dynarmic_64.h index 92f715f19..5214a8147 100644 --- a/src/core/arm/dynarmic/arm_dynarmic_64.h +++ b/src/core/arm/dynarmic/arm_dynarmic_64.h @@ -40,7 +40,6 @@ public: void SetPSTATE(u32 pstate) override; void Run() override; void Step() override; - void ExceptionalExit() override; VAddr GetTlsAddress() const override; void SetTlsAddress(VAddr address) override; void SetTPIDR_EL0(u64 value) override; @@ -75,6 +74,12 @@ private: DynarmicExclusiveMonitor& exclusive_monitor; std::shared_ptr<Dynarmic::A64::Jit> jit; + + // SVC callback + u32 svc_swi{}; + bool svc_called{}; + + bool shutdown{}; }; } // namespace Core |