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authorReinUsesLisp <reinuseslisp@airmail.cc>2021-05-30 23:08:17 -0300
committerameerj <52414509+ameerj@users.noreply.github.com>2021-07-22 21:51:34 -0400
commit05d41fa9b70af6d469f2f6f1474436c9255e9bc3 (patch)
tree52bd8f8a6456c46fc9120aafa99b2d4a45b79746 /src/shader_recompiler/backend/glasm
parent5d170de0b5c57afdfc7c633c0b3b36d7ea9299c2 (diff)
shader: Add support for "negative" and unaligned offsets
"Negative" offsets don't exist. They are shown as such due to a bug in nvdisasm. Unaligned offsets have been proved to read the aligned offset. For example, when reading an U32, if the offset is 6, the offset read will be 4.
Diffstat (limited to 'src/shader_recompiler/backend/glasm')
-rw-r--r--src/shader_recompiler/backend/glasm/emit_glasm_context_get_set.cpp8
1 files changed, 8 insertions, 0 deletions
diff --git a/src/shader_recompiler/backend/glasm/emit_glasm_context_get_set.cpp b/src/shader_recompiler/backend/glasm/emit_glasm_context_get_set.cpp
index 787612def..9ad668b86 100644
--- a/src/shader_recompiler/backend/glasm/emit_glasm_context_get_set.cpp
+++ b/src/shader_recompiler/backend/glasm/emit_glasm_context_get_set.cpp
@@ -18,6 +18,14 @@ void GetCbuf(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding, ScalarU
throw NotImplementedException("Indirect constant buffer loading");
}
const Register ret{ctx.reg_alloc.Define(inst)};
+ if (offset.type == Type::U32) {
+ // Avoid reading arrays out of bounds, matching hardware's behavior
+ const u32 imm_offset{offset.imm_u32};
+ if (offset.imm_u32 >= 0x10'000) {
+ ctx.Add("MOV.S {},0;", ret);
+ return;
+ }
+ }
ctx.Add("LDC.{} {},c{}[{}];", size, ret, binding.U32(), offset);
}