diff options
| author | FernandoS27 <fsahmkow27@gmail.com> | 2021-03-27 22:30:24 +0100 | 
|---|---|---|
| committer | ameerj <52414509+ameerj@users.noreply.github.com> | 2021-07-22 21:51:25 -0400 | 
| commit | 34aba9627a8fad20b3b173180e2f3d679dd32293 (patch) | |
| tree | a4f2faec67a793e8b44493532a683908dcefb4d8 /src/shader_recompiler/frontend/maxwell/translate/impl | |
| parent | 39a379632ea9f5eec9877b53668ebf385d0520bf (diff) | |
shader: Implement BRX
Diffstat (limited to 'src/shader_recompiler/frontend/maxwell/translate/impl')
4 files changed, 78 insertions, 34 deletions
| diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/branch_indirect.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/branch_indirect.cpp new file mode 100644 index 000000000..371c0e0f7 --- /dev/null +++ b/src/shader_recompiler/frontend/maxwell/translate/impl/branch_indirect.cpp @@ -0,0 +1,36 @@ +// Copyright 2021 yuzu Emulator Project +// Licensed under GPLv2 or any later version +// Refer to the license.txt file included. + +#include "common/bit_field.h" +#include "common/common_types.h" +#include "shader_recompiler/exception.h" +#include "shader_recompiler/frontend/maxwell/translate/impl/impl.h" + +namespace Shader::Maxwell { +namespace { +void Check(u64 insn) { +    union { +        u64 raw; +        BitField<5, 1, u64> cbuf_mode; +        BitField<6, 1, u64> lmt; +    } const encoding{insn}; + +    if (encoding.cbuf_mode != 0) { +        throw NotImplementedException("Constant buffer mode"); +    } +    if (encoding.lmt != 0) { +        throw NotImplementedException("LMT"); +    } +} +} // Anonymous namespace + +void TranslatorVisitor::BRX(u64 insn) { +    Check(insn); +} + +void TranslatorVisitor::JMX(u64 insn) { +    Check(insn); +} + +} // namespace Shader::Maxwell diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/load_constant.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/load_constant.cpp index 39becf93c..49ccb7d62 100644 --- a/src/shader_recompiler/frontend/maxwell/translate/impl/load_constant.cpp +++ b/src/shader_recompiler/frontend/maxwell/translate/impl/load_constant.cpp @@ -5,25 +5,11 @@  #include "common/bit_field.h"  #include "common/common_types.h"  #include "shader_recompiler/frontend/maxwell/translate/impl/impl.h" +#include "shader_recompiler/frontend/maxwell/translate/impl/load_constant.h"  namespace Shader::Maxwell { +using namespace LDC;  namespace { -enum class Mode : u64 { -    Default, -    IL, -    IS, -    ISL, -}; - -enum class Size : u64 { -    U8, -    S8, -    U16, -    S16, -    B32, -    B64, -}; -  std::pair<IR::U32, IR::U32> Slot(IR::IREmitter& ir, Mode mode, const IR::U32& imm_index,                                   const IR::U32& reg, const IR::U32& imm) {      switch (mode) { @@ -37,16 +23,7 @@ std::pair<IR::U32, IR::U32> Slot(IR::IREmitter& ir, Mode mode, const IR::U32& im  } // Anonymous namespace  void TranslatorVisitor::LDC(u64 insn) { -    union { -        u64 raw; -        BitField<0, 8, IR::Reg> dest_reg; -        BitField<8, 8, IR::Reg> src_reg; -        BitField<20, 16, s64> offset; -        BitField<36, 5, u64> index; -        BitField<44, 2, Mode> mode; -        BitField<48, 3, Size> size; -    } const ldc{insn}; - +    const Encoding ldc{insn};      const IR::U32 imm_index{ir.Imm32(static_cast<u32>(ldc.index))};      const IR::U32 reg{X(ldc.src_reg)};      const IR::U32 imm{ir.Imm32(static_cast<s32>(ldc.offset))}; diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/load_constant.h b/src/shader_recompiler/frontend/maxwell/translate/impl/load_constant.h new file mode 100644 index 000000000..3074ea0e3 --- /dev/null +++ b/src/shader_recompiler/frontend/maxwell/translate/impl/load_constant.h @@ -0,0 +1,39 @@ +// Copyright 2021 yuzu Emulator Project +// Licensed under GPLv2 or any later version +// Refer to the license.txt file included. + +#pragma once + +#include "common/bit_field.h" +#include "common/common_types.h" +#include "shader_recompiler/frontend/ir/reg.h" + +namespace Shader::Maxwell::LDC { + +enum class Mode : u64 { +    Default, +    IL, +    IS, +    ISL, +}; + +enum class Size : u64 { +    U8, +    S8, +    U16, +    S16, +    B32, +    B64, +}; + +union Encoding { +    u64 raw; +    BitField<0, 8, IR::Reg> dest_reg; +    BitField<8, 8, IR::Reg> src_reg; +    BitField<20, 16, s64> offset; +    BitField<36, 5, u64> index; +    BitField<44, 2, Mode> mode; +    BitField<48, 3, Size> size; +}; + +} // namespace Shader::Maxwell::LDC diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/not_implemented.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/not_implemented.cpp index b62d8ee2a..a0057a473 100644 --- a/src/shader_recompiler/frontend/maxwell/translate/impl/not_implemented.cpp +++ b/src/shader_recompiler/frontend/maxwell/translate/impl/not_implemented.cpp @@ -53,10 +53,6 @@ void TranslatorVisitor::BRK(u64) {      ThrowNotImplemented(Opcode::BRK);  } -void TranslatorVisitor::BRX(u64) { -    ThrowNotImplemented(Opcode::BRX); -} -  void TranslatorVisitor::CAL() {      // CAL is a no-op  } @@ -181,10 +177,6 @@ void TranslatorVisitor::JMP(u64) {      ThrowNotImplemented(Opcode::JMP);  } -void TranslatorVisitor::JMX(u64) { -    ThrowNotImplemented(Opcode::JMX); -} -  void TranslatorVisitor::KIL() {      // KIL is a no-op  } | 
