diff options
| author | bunnei <bunneidev@gmail.com> | 2018-06-05 23:46:23 -0400 |
|---|---|---|
| committer | bunnei <bunneidev@gmail.com> | 2018-06-06 18:09:06 -0400 |
| commit | 4669f15f8be26ddf3c1cc02d8aac78656c41d361 (patch) | |
| tree | 3e6968e43a2377a0bfd8bb45f3ea8141f9bd0568 /src/video_core/engines | |
| parent | 4112aa68a673db4a8b73bc53270fdfa7f68532bf (diff) | |
gl_shader_decompiler: Implement LD_C instruction.
Diffstat (limited to 'src/video_core/engines')
| -rw-r--r-- | src/video_core/engines/shader_bytecode.h | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/src/video_core/engines/shader_bytecode.h b/src/video_core/engines/shader_bytecode.h index 7a74771ce..af18c2d81 100644 --- a/src/video_core/engines/shader_bytecode.h +++ b/src/video_core/engines/shader_bytecode.h @@ -175,6 +175,15 @@ enum class FloatRoundingOp : u64 { Trunc = 3, }; +enum class UniformType : u64 { + UnsignedByte = 0, + SignedByte = 1, + UnsignedShort = 2, + SignedShort = 3, + Single = 4, + Double = 5, +}; + union Instruction { Instruction& operator=(const Instruction& instr) { value = instr.value; @@ -253,6 +262,11 @@ union Instruction { } ffma; union { + BitField<48, 3, UniformType> type; + BitField<44, 2, u64> unknown; + } ld_c; + + union { BitField<0, 3, u64> pred0; BitField<3, 3, u64> pred3; BitField<7, 1, u64> abs_a; @@ -378,6 +392,7 @@ public: KIL, BRA, LD_A, + LD_C, ST_A, TEX, TEXQ, // Texture Query @@ -552,6 +567,7 @@ private: INST("111000110011----", Id::KIL, Type::Flow, "KIL"), INST("111000100100----", Id::BRA, Type::Flow, "BRA"), INST("1110111111011---", Id::LD_A, Type::Memory, "LD_A"), + INST("1110111110010---", Id::LD_C, Type::Memory, "LD_C"), INST("1110111111110---", Id::ST_A, Type::Memory, "ST_A"), INST("1100000000111---", Id::TEX, Type::Memory, "TEX"), INST("1101111101001---", Id::TEXQ, Type::Memory, "TEXQ"), |