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| author | bunnei <bunneidev@gmail.com> | 2020-02-04 11:36:59 -0500 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-02-04 11:36:59 -0500 |
| commit | bf21aacc7412c930da21e36850f24e97c3f103f6 (patch) | |
| tree | e6bf9646156c8041dff2759e66b0fd0b6856c1b4 /src/video_core/engines | |
| parent | 57332878223cd4d92ed0990b215286b623a81aed (diff) | |
| parent | e3fc3459c817398fdc9a878c2e554e4580b1d863 (diff) | |
Merge pull request #3356 from ReinUsesLisp/fcmp
shader/arithmetic: Implement FCMP
Diffstat (limited to 'src/video_core/engines')
| -rw-r--r-- | src/video_core/engines/shader_bytecode.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/src/video_core/engines/shader_bytecode.h b/src/video_core/engines/shader_bytecode.h index f443ec0fe..cbb201114 100644 --- a/src/video_core/engines/shader_bytecode.h +++ b/src/video_core/engines/shader_bytecode.h @@ -1124,6 +1124,11 @@ union Instruction { } fset; union { + BitField<47, 1, u64> ftz; + BitField<48, 4, PredCondition> cond; + } fcmp; + + union { BitField<49, 1, u64> bf; BitField<35, 3, PredCondition> cond; BitField<50, 1, u64> ftz; @@ -1800,6 +1805,7 @@ public: ICMP_R, ICMP_CR, ICMP_IMM, + FCMP_R, MUFU, // Multi-Function Operator RRO_C, // Range Reduction Operator RRO_R, @@ -2104,6 +2110,7 @@ private: INST("0101110100100---", Id::HSETP2_R, Type::HalfSetPredicate, "HSETP2_R"), INST("0111111-0-------", Id::HSETP2_IMM, Type::HalfSetPredicate, "HSETP2_IMM"), INST("0101110100011---", Id::HSET2_R, Type::HalfSet, "HSET2_R"), + INST("010110111010----", Id::FCMP_R, Type::Arithmetic, "FCMP_R"), INST("0101000010000---", Id::MUFU, Type::Arithmetic, "MUFU"), INST("0100110010010---", Id::RRO_C, Type::Arithmetic, "RRO_C"), INST("0101110010010---", Id::RRO_R, Type::Arithmetic, "RRO_R"), |