diff options
| author | Rodrigo Locatti <reinuseslisp@airmail.cc> | 2020-09-10 02:28:54 +0000 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-09-10 02:28:54 +0000 |
| commit | 663ea382dae4b0a8d958753fb370416b1602c55e (patch) | |
| tree | 74db3117e649cb5ae1a265c69f68d2bb03b9d542 /src/video_core/shader | |
| parent | d90961122ca4d3a1c1f452e1d1b3fb14f790334e (diff) | |
| parent | 9e871937250cb92a13336c6c06186c41f19e1738 (diff) | |
Merge pull request #4633 from ReinUsesLisp/gpu-init
video_core: Remove all Core::System references in renderer
Diffstat (limited to 'src/video_core/shader')
| -rw-r--r-- | src/video_core/shader/memory_util.cpp | 7 | ||||
| -rw-r--r-- | src/video_core/shader/memory_util.h | 6 |
2 files changed, 4 insertions, 9 deletions
diff --git a/src/video_core/shader/memory_util.cpp b/src/video_core/shader/memory_util.cpp index 5071c83ca..e18ccba8e 100644 --- a/src/video_core/shader/memory_util.cpp +++ b/src/video_core/shader/memory_util.cpp @@ -16,11 +16,10 @@ namespace VideoCommon::Shader { -GPUVAddr GetShaderAddress(Core::System& system, +GPUVAddr GetShaderAddress(Tegra::Engines::Maxwell3D& maxwell3d, Tegra::Engines::Maxwell3D::Regs::ShaderProgram program) { - const auto& gpu{system.GPU().Maxwell3D()}; - const auto& shader_config{gpu.regs.shader_config[static_cast<std::size_t>(program)]}; - return gpu.regs.code_address.CodeAddress() + shader_config.offset; + const auto& shader_config{maxwell3d.regs.shader_config[static_cast<std::size_t>(program)]}; + return maxwell3d.regs.code_address.CodeAddress() + shader_config.offset; } bool IsSchedInstruction(std::size_t offset, std::size_t main_offset) { diff --git a/src/video_core/shader/memory_util.h b/src/video_core/shader/memory_util.h index be90d24fd..4624d38e6 100644 --- a/src/video_core/shader/memory_util.h +++ b/src/video_core/shader/memory_util.h @@ -11,10 +11,6 @@ #include "video_core/engines/maxwell_3d.h" #include "video_core/engines/shader_type.h" -namespace Core { -class System; -} - namespace Tegra { class MemoryManager; } @@ -27,7 +23,7 @@ constexpr u32 STAGE_MAIN_OFFSET = 10; constexpr u32 KERNEL_MAIN_OFFSET = 0; /// Gets the address for the specified shader stage program -GPUVAddr GetShaderAddress(Core::System& system, +GPUVAddr GetShaderAddress(Tegra::Engines::Maxwell3D& maxwell3d, Tegra::Engines::Maxwell3D::Regs::ShaderProgram program); /// Gets if the current instruction offset is a scheduler instruction |