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| author | bunnei <bunneidev@gmail.com> | 2020-02-07 22:06:57 -0500 | 
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-02-07 22:06:57 -0500 | 
| commit | 90df4b8e2b07be217b8fc2d08b766577710b3945 (patch) | |
| tree | 72d14549e5b0ab0e8de836ece410667b278c2a2f /src/video_core | |
| parent | aa3f9b960697da4a62a9e9987bc2a0db6a1ce5a8 (diff) | |
| parent | 729ca120e379b67f99663e1fde57285e4cbefc4c (diff) | |
Merge pull request #3369 from ReinUsesLisp/shf
shader/shift: Implement SHF
Diffstat (limited to 'src/video_core')
| -rw-r--r-- | src/video_core/engines/shader_bytecode.h | 20 | ||||
| -rw-r--r-- | src/video_core/shader/decode/shift.cpp | 113 | 
2 files changed, 122 insertions, 11 deletions
| diff --git a/src/video_core/engines/shader_bytecode.h b/src/video_core/engines/shader_bytecode.h index 81b6d9eff..402869fde 100644 --- a/src/video_core/engines/shader_bytecode.h +++ b/src/video_core/engines/shader_bytecode.h @@ -624,6 +624,19 @@ enum class ShuffleOperation : u64 {      Bfly = 3, // shuffleXorNV  }; +enum class ShfType : u64 { +    Bits32 = 0, +    U64 = 2, +    S64 = 3, +}; + +enum class ShfXmode : u64 { +    None = 0, +    HI = 1, +    X = 2, +    XHI = 3, +}; +  union Instruction {      constexpr Instruction& operator=(const Instruction& instr) {          value = instr.value; @@ -776,6 +789,13 @@ union Instruction {      } shr;      union { +        BitField<37, 2, ShfType> type; +        BitField<48, 2, ShfXmode> xmode; +        BitField<50, 1, u64> wrap; +        BitField<20, 6, u64> immediate; +    } shf; + +    union {          BitField<39, 5, u64> shift_amount;          BitField<48, 1, u64> negate_b;          BitField<49, 1, u64> negate_a; diff --git a/src/video_core/shader/decode/shift.cpp b/src/video_core/shader/decode/shift.cpp index d419e9c45..3b391d3e6 100644 --- a/src/video_core/shader/decode/shift.cpp +++ b/src/video_core/shader/decode/shift.cpp @@ -10,8 +10,80 @@  namespace VideoCommon::Shader { +using std::move;  using Tegra::Shader::Instruction;  using Tegra::Shader::OpCode; +using Tegra::Shader::ShfType; +using Tegra::Shader::ShfXmode; + +namespace { + +Node IsFull(Node shift) { +    return Operation(OperationCode::LogicalIEqual, move(shift), Immediate(32)); +} + +Node Shift(OperationCode opcode, Node value, Node shift) { +    Node is_full = Operation(OperationCode::LogicalIEqual, shift, Immediate(32)); +    Node shifted = Operation(opcode, move(value), shift); +    return Operation(OperationCode::Select, IsFull(move(shift)), Immediate(0), move(shifted)); +} + +Node ClampShift(Node shift, s32 size = 32) { +    shift = Operation(OperationCode::IMax, move(shift), Immediate(0)); +    return Operation(OperationCode::IMin, move(shift), Immediate(size)); +} + +Node WrapShift(Node shift, s32 size = 32) { +    return Operation(OperationCode::UBitwiseAnd, move(shift), Immediate(size - 1)); +} + +Node ShiftRight(Node low, Node high, Node shift, Node low_shift, ShfType type) { +    // These values are used when the shift value is less than 32 +    Node less_low = Shift(OperationCode::ILogicalShiftRight, low, shift); +    Node less_high = Shift(OperationCode::ILogicalShiftLeft, high, low_shift); +    Node less = Operation(OperationCode::IBitwiseOr, move(less_high), move(less_low)); + +    if (type == ShfType::Bits32) { +        // On 32 bit shifts we are either full (shifting 32) or shifting less than 32 bits +        return Operation(OperationCode::Select, IsFull(move(shift)), move(high), move(less)); +    } + +    // And these when it's larger than or 32 +    const bool is_signed = type == ShfType::S64; +    const auto opcode = SignedToUnsignedCode(OperationCode::IArithmeticShiftRight, is_signed); +    Node reduced = Operation(OperationCode::IAdd, shift, Immediate(-32)); +    Node greater = Shift(opcode, high, move(reduced)); + +    Node is_less = Operation(OperationCode::LogicalILessThan, shift, Immediate(32)); +    Node is_zero = Operation(OperationCode::LogicalIEqual, move(shift), Immediate(0)); + +    Node value = Operation(OperationCode::Select, move(is_less), move(less), move(greater)); +    return Operation(OperationCode::Select, move(is_zero), move(high), move(value)); +} + +Node ShiftLeft(Node low, Node high, Node shift, Node low_shift, ShfType type) { +    // These values are used when the shift value is less than 32 +    Node less_low = Operation(OperationCode::ILogicalShiftRight, low, low_shift); +    Node less_high = Operation(OperationCode::ILogicalShiftLeft, high, shift); +    Node less = Operation(OperationCode::IBitwiseOr, move(less_low), move(less_high)); + +    if (type == ShfType::Bits32) { +        // On 32 bit shifts we are either full (shifting 32) or shifting less than 32 bits +        return Operation(OperationCode::Select, IsFull(move(shift)), move(low), move(less)); +    } + +    // And these when it's larger than or 32 +    Node reduced = Operation(OperationCode::IAdd, shift, Immediate(-32)); +    Node greater = Shift(OperationCode::ILogicalShiftLeft, move(low), move(reduced)); + +    Node is_less = Operation(OperationCode::LogicalILessThan, shift, Immediate(32)); +    Node is_zero = Operation(OperationCode::LogicalIEqual, move(shift), Immediate(0)); + +    Node value = Operation(OperationCode::Select, move(is_less), move(less), move(greater)); +    return Operation(OperationCode::Select, move(is_zero), move(high), move(value)); +} + +} // Anonymous namespace  u32 ShaderIR::DecodeShift(NodeBlock& bb, u32 pc) {      const Instruction instr = {program_code[pc]}; @@ -28,29 +100,48 @@ u32 ShaderIR::DecodeShift(NodeBlock& bb, u32 pc) {          }      }(); -    switch (opcode->get().GetId()) { +    switch (const auto opid = opcode->get().GetId(); opid) {      case OpCode::Id::SHR_C:      case OpCode::Id::SHR_R:      case OpCode::Id::SHR_IMM: { -        if (instr.shr.wrap) { -            op_b = Operation(OperationCode::UBitwiseAnd, std::move(op_b), Immediate(0x1f)); -        } else { -            op_b = Operation(OperationCode::IMax, std::move(op_b), Immediate(0)); -            op_b = Operation(OperationCode::IMin, std::move(op_b), Immediate(31)); -        } +        op_b = instr.shr.wrap ? WrapShift(move(op_b)) : ClampShift(move(op_b));          Node value = SignedOperation(OperationCode::IArithmeticShiftRight, instr.shift.is_signed, -                                     std::move(op_a), std::move(op_b)); +                                     move(op_a), move(op_b));          SetInternalFlagsFromInteger(bb, value, instr.generates_cc); -        SetRegister(bb, instr.gpr0, std::move(value)); +        SetRegister(bb, instr.gpr0, move(value));          break;      }      case OpCode::Id::SHL_C:      case OpCode::Id::SHL_R:      case OpCode::Id::SHL_IMM: { -        const Node value = Operation(OperationCode::ILogicalShiftLeft, op_a, op_b); +        Node value = Operation(OperationCode::ILogicalShiftLeft, op_a, op_b);          SetInternalFlagsFromInteger(bb, value, instr.generates_cc); -        SetRegister(bb, instr.gpr0, value); +        SetRegister(bb, instr.gpr0, move(value)); +        break; +    } +    case OpCode::Id::SHF_RIGHT_R: +    case OpCode::Id::SHF_RIGHT_IMM: +    case OpCode::Id::SHF_LEFT_R: +    case OpCode::Id::SHF_LEFT_IMM: { +        UNIMPLEMENTED_IF(instr.generates_cc); +        UNIMPLEMENTED_IF_MSG(instr.shf.xmode != ShfXmode::None, "xmode={}", +                             static_cast<int>(instr.shf.xmode.Value())); + +        if (instr.is_b_imm) { +            op_b = Immediate(static_cast<u32>(instr.shf.immediate)); +        } +        const s32 size = instr.shf.type == ShfType::Bits32 ? 32 : 64; +        Node shift = instr.shf.wrap ? WrapShift(move(op_b), size) : ClampShift(move(op_b), size); + +        Node negated_shift = Operation(OperationCode::INegate, shift); +        Node low_shift = Operation(OperationCode::IAdd, move(negated_shift), Immediate(32)); + +        const bool is_right = opid == OpCode::Id::SHF_RIGHT_R || opid == OpCode::Id::SHF_RIGHT_IMM; +        Node value = (is_right ? ShiftRight : ShiftLeft)( +            move(op_a), GetRegister(instr.gpr39), move(shift), move(low_shift), instr.shf.type); + +        SetRegister(bb, instr.gpr0, move(value));          break;      }      default: | 
