diff options
| author | bunnei <bunneidev@gmail.com> | 2018-04-25 22:42:54 -0400 | 
|---|---|---|
| committer | GitHub <noreply@github.com> | 2018-04-25 22:42:54 -0400 | 
| commit | f81b915fd8112b9ae50c75d3bd2feafa9c8cda93 (patch) | |
| tree | 9c4a3c0937698df3ea00dab528f2eaebb4418bb8 /src/video_core | |
| parent | dd6c67c62764f3974185a1fd361690e5065dceb2 (diff) | |
| parent | e9ad8e9185a4ab7f29728dbaf131de328eefc4fc (diff) | |
Merge pull request #396 from Subv/shader_ops
 Shaders: Implemented the FSET instruction.
Diffstat (limited to 'src/video_core')
| -rw-r--r-- | src/video_core/engines/shader_bytecode.h | 43 | ||||
| -rw-r--r-- | src/video_core/renderer_opengl/gl_shader_decompiler.cpp | 55 | 
2 files changed, 89 insertions, 9 deletions
diff --git a/src/video_core/engines/shader_bytecode.h b/src/video_core/engines/shader_bytecode.h index 5a006aee5..f4d11fa5d 100644 --- a/src/video_core/engines/shader_bytecode.h +++ b/src/video_core/engines/shader_bytecode.h @@ -214,6 +214,20 @@ union Instruction {          BitField<56, 1, u64> neg_b;      } fsetp; +    union { +        BitField<39, 3, u64> pred39; +        BitField<42, 1, u64> neg_pred; +        BitField<43, 1, u64> neg_a; +        BitField<44, 1, u64> abs_b; +        BitField<45, 2, PredOperation> op; +        BitField<48, 4, PredCondition> cond; +        BitField<53, 1, u64> neg_b; +        BitField<54, 1, u64> abs_a; +        BitField<52, 1, u64> bf; +        BitField<55, 1, u64> ftz; +        BitField<56, 1, u64> neg_imm; +    } fset; +      BitField<61, 1, u64> is_b_imm;      BitField<60, 1, u64> is_b_gpr;      BitField<59, 1, u64> is_c_gpr; @@ -261,6 +275,9 @@ public:          I2F_C,          I2F_R,          I2F_IMM, +        I2I_C, +        I2I_R, +        I2I_IMM,          LOP32I,          MOV_C,          MOV_R, @@ -272,6 +289,9 @@ public:          FSETP_C, // Set Predicate          FSETP_R,          FSETP_IMM, +        FSET_C, +        FSET_R, +        FSET_IMM,          ISETP_C,          ISETP_IMM,          ISETP_R, @@ -283,8 +303,9 @@ public:          Ffma,          Flow,          Memory, -        FloatPredicate, -        IntegerPredicate, +        FloatSet, +        FloatSetPredicate, +        IntegerSetPredicate,          Unknown,      }; @@ -409,6 +430,9 @@ private:              INST("0100110010111---", Id::I2F_C, Type::Arithmetic, "I2F_C"),              INST("0101110010111---", Id::I2F_R, Type::Arithmetic, "I2F_R"),              INST("0011100-10111---", Id::I2F_IMM, Type::Arithmetic, "I2F_IMM"), +            INST("0100110011100---", Id::I2I_C, Type::Arithmetic, "I2I_C"), +            INST("0101110011100---", Id::I2I_R, Type::Arithmetic, "I2I_R"), +            INST("01110001-1000---", Id::I2I_IMM, Type::Arithmetic, "I2I_IMM"),              INST("000001----------", Id::LOP32I, Type::Arithmetic, "LOP32I"),              INST("0100110010011---", Id::MOV_C, Type::Arithmetic, "MOV_C"),              INST("0101110010011---", Id::MOV_R, Type::Arithmetic, "MOV_R"), @@ -417,12 +441,15 @@ private:              INST("0100110000101---", Id::SHR_C, Type::Arithmetic, "SHR_C"),              INST("0101110000101---", Id::SHR_R, Type::Arithmetic, "SHR_R"),              INST("0011100-00101---", Id::SHR_IMM, Type::Arithmetic, "SHR_IMM"), -            INST("010010111011----", Id::FSETP_C, Type::FloatPredicate, "FSETP_C"), -            INST("010110111011----", Id::FSETP_R, Type::FloatPredicate, "FSETP_R"), -            INST("0011011-1011----", Id::FSETP_IMM, Type::FloatPredicate, "FSETP_IMM"), -            INST("010010110110----", Id::ISETP_C, Type::IntegerPredicate, "ISETP_C"), -            INST("010110110110----", Id::ISETP_R, Type::IntegerPredicate, "ISETP_R"), -            INST("0011011-0110----", Id::ISETP_IMM, Type::IntegerPredicate, "ISETP_IMM"), +            INST("01011000--------", Id::FSET_R, Type::FloatSet, "FSET_R"), +            INST("0100100---------", Id::FSET_C, Type::FloatSet, "FSET_C"), +            INST("0011000---------", Id::FSET_IMM, Type::FloatSet, "FSET_IMM"), +            INST("010010111011----", Id::FSETP_C, Type::FloatSetPredicate, "FSETP_C"), +            INST("010110111011----", Id::FSETP_R, Type::FloatSetPredicate, "FSETP_R"), +            INST("0011011-1011----", Id::FSETP_IMM, Type::FloatSetPredicate, "FSETP_IMM"), +            INST("010010110110----", Id::ISETP_C, Type::IntegerSetPredicate, "ISETP_C"), +            INST("010110110110----", Id::ISETP_R, Type::IntegerSetPredicate, "ISETP_R"), +            INST("0011011-0110----", Id::ISETP_IMM, Type::IntegerSetPredicate, "ISETP_IMM"),          };  #undef INST          std::stable_sort(table.begin(), table.end(), [](const auto& a, const auto& b) { diff --git a/src/video_core/renderer_opengl/gl_shader_decompiler.cpp b/src/video_core/renderer_opengl/gl_shader_decompiler.cpp index 086424395..3dffb205d 100644 --- a/src/video_core/renderer_opengl/gl_shader_decompiler.cpp +++ b/src/video_core/renderer_opengl/gl_shader_decompiler.cpp @@ -519,7 +519,7 @@ private:              }              break;          } -        case OpCode::Type::FloatPredicate: { +        case OpCode::Type::FloatSetPredicate: {              std::string op_a = instr.fsetp.neg_a ? "-" : "";              op_a += GetRegister(instr.gpr8); @@ -570,6 +570,59 @@ private:              }              break;          } +        case OpCode::Type::FloatSet: { +            std::string dest = GetRegister(instr.gpr0); +            std::string op_a = instr.fset.neg_a ? "-" : ""; +            op_a += GetRegister(instr.gpr8); + +            if (instr.fset.abs_a) { +                op_a = "abs(" + op_a + ')'; +            } + +            std::string op_b = instr.fset.neg_b ? "-" : ""; + +            if (instr.is_b_imm) { +                std::string imm = GetImmediate19(instr); +                if (instr.fset.neg_imm) +                    op_b += "(-" + imm + ')'; +                else +                    op_b += imm; +            } else { +                if (instr.is_b_gpr) { +                    op_b += GetRegister(instr.gpr20); +                } else { +                    op_b += GetUniform(instr.uniform); +                } +            } + +            if (instr.fset.abs_b) { +                op_b = "abs(" + op_b + ")"; +            } + +            using Tegra::Shader::Pred; +            ASSERT_MSG(instr.fset.pred39 == static_cast<u64>(Pred::UnusedIndex), +                       "Compound predicates are not implemented"); + +            // The fset instruction sets a register to 1.0 if the condition is true, and to 0 +            // otherwise. +            using Tegra::Shader::PredCondition; +            switch (instr.fset.cond) { +            case PredCondition::LessThan: +                SetDest(0, dest, "((" + op_a + ") < (" + op_b + ")) ? 1.0 : 0", 1, 1); +                break; +            case PredCondition::Equal: +                SetDest(0, dest, "((" + op_a + ") == (" + op_b + ")) ? 1.0 : 0", 1, 1); +                break; +            case PredCondition::GreaterThan: +                SetDest(0, dest, "((" + op_a + ") > (" + op_b + ")) ? 1.0 : 0", 1, 1); +                break; +            default: +                NGLOG_CRITICAL(HW_GPU, "Unhandled predicate condition: {} (a: {}, b: {})", +                               static_cast<unsigned>(instr.fset.cond.Value()), op_a, op_b); +                UNREACHABLE(); +            } +            break; +        }          default: {              switch (opcode->GetId()) {              case OpCode::Id::EXIT: {  | 
