diff options
author | bunnei <bunneidev@gmail.com> | 2018-04-09 22:09:23 -0400 |
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committer | bunnei <bunneidev@gmail.com> | 2018-04-14 16:01:40 -0400 |
commit | 5a47832221fb03a50af2583ec311114871ea1dd1 (patch) | |
tree | 117326890470f9a63768334dfb218d3523eaecdb /src | |
parent | 50023bdae790a607b3a6e6279465c2520279f70b (diff) |
shader_bytecode: Add SubOp decoding.
Diffstat (limited to 'src')
-rw-r--r-- | src/video_core/engines/shader_bytecode.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/src/video_core/engines/shader_bytecode.h b/src/video_core/engines/shader_bytecode.h index 6660742cc..477d01f94 100644 --- a/src/video_core/engines/shader_bytecode.h +++ b/src/video_core/engines/shader_bytecode.h @@ -265,6 +265,15 @@ enum class Pred : u64 { NeverExecute = 0xf, }; +enum class SubOp : u64 { + Cos = 0x0, + Sin = 0x1, + Ex2 = 0x2, + Lg2 = 0x3, + Rcp = 0x4, + Rsq = 0x5, +}; + #pragma pack(1) union Instruction { Instruction& operator=(const Instruction& instr) { @@ -276,6 +285,7 @@ union Instruction { BitField<0, 8, Register> gpr1; BitField<8, 8, Register> gpr2; BitField<16, 4, Pred> pred; + BitField<20, 7, SubOp> sub_op; BitField<39, 8, Register> gpr3; BitField<45, 1, u64> nb; BitField<46, 1, u64> aa; |