diff options
author | bunnei <bunneidev@gmail.com> | 2015-01-12 14:52:01 -0500 |
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committer | bunnei <bunneidev@gmail.com> | 2015-01-12 14:52:01 -0500 |
commit | 86e8ff85c9fb1b9265d14581b314ae6faac034c9 (patch) | |
tree | 55448ac982348dae114371d67ad9fb899370b1e1 /src | |
parent | ac05c4acb0dee32c9b64d03640bc4da53ec296b9 (diff) | |
parent | f7770b83d49f3ac791f095ade399705a4d04fe63 (diff) |
Merge pull request #476 from lioncash/asr
dyncom: Fix 32-bit ASR shifts for immediates
Diffstat (limited to 'src')
-rw-r--r-- | src/core/arm/dyncom/arm_dyncom_interpreter.cpp | 8 |
1 files changed, 3 insertions, 5 deletions
diff --git a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp index c6a9baae3..b5e0993ed 100644 --- a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp +++ b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp @@ -176,13 +176,11 @@ unsigned int DPO(ArithmeticShiftRightByImmediate)(arm_processor *cpu, unsigned i unsigned int shifter_operand; int shift_imm = BITS(sht_oper, 7, 11); if (shift_imm == 0) { - if (BIT(rm, 31)) { + if (BIT(rm, 31) == 0) shifter_operand = 0; - cpu->shifter_carry_out = BIT(rm, 31); - } else { + else shifter_operand = 0xFFFFFFFF; - cpu->shifter_carry_out = BIT(rm, 31); - } + cpu->shifter_carry_out = BIT(rm, 31); } else { shifter_operand = static_cast<int>(rm) >> shift_imm; cpu->shifter_carry_out = BIT(rm, shift_imm - 1); |