diff options
| author | bunnei <ericbunnie@gmail.com> | 2014-04-12 01:35:45 -0400 |
|---|---|---|
| committer | bunnei <ericbunnie@gmail.com> | 2014-04-12 01:35:45 -0400 |
| commit | cd7de52fea8359da3c37f661b0da0c145b9b3f7e (patch) | |
| tree | ad44f55a01779b531140f94a533b6362471b45c4 /src | |
| parent | 9a9b7b289ab87e22b9896c0345d42b61c47a304f (diff) | |
added a SETABORT method that does not update LR (for HLE'd SVC that does not jump appcore CPU to an IRQ vector)
Diffstat (limited to 'src')
| -rw-r--r-- | src/core/arm/interpreter/armemu.h | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/src/core/arm/interpreter/armemu.h b/src/core/arm/interpreter/armemu.h index 7391dea7f..7c118948a 100644 --- a/src/core/arm/interpreter/armemu.h +++ b/src/core/arm/interpreter/armemu.h @@ -229,6 +229,17 @@ extern ARMword isize; } \ while (0) +#define SETABORT_SKIPBRANCH(i, m, d) \ + do \ + { \ + int SETABORT_mode = (m); \ + \ + ARMul_SetSPSR (state, SETABORT_mode, ARMul_GetCPSR (state)); \ + ARMul_SetCPSR (state, ((ARMul_GetCPSR (state) & ~(EMODE | TBIT)) \ + | (i) | SETABORT_mode)); \ + } \ + while (0) + //#ifndef MODE32 #define VECTORS 0x20 #define LEGALADDR 0x03ffffff |