diff options
Diffstat (limited to 'src/core')
| -rw-r--r-- | src/core/CMakeLists.txt | 1 | ||||
| -rw-r--r-- | src/core/arm/dyncom/arm_dyncom.cpp | 1 | ||||
| -rw-r--r-- | src/core/arm/dyncom/arm_dyncom_dec.cpp | 4 | ||||
| -rw-r--r-- | src/core/arm/dyncom/arm_dyncom_dec.h | 4 | ||||
| -rw-r--r-- | src/core/arm/dyncom/arm_dyncom_interpreter.cpp | 1 | ||||
| -rw-r--r-- | src/core/arm/dyncom/arm_dyncom_thumb.cpp | 1 | ||||
| -rw-r--r-- | src/core/arm/skyeye_common/armdefs.h | 34 | ||||
| -rw-r--r-- | src/core/arm/skyeye_common/armmmu.h | 1 | ||||
| -rw-r--r-- | src/core/arm/skyeye_common/armsupp.cpp | 9 | ||||
| -rw-r--r-- | src/core/arm/skyeye_common/armsupp.h | 42 | 
10 files changed, 57 insertions, 41 deletions
diff --git a/src/core/CMakeLists.txt b/src/core/CMakeLists.txt index adf15d66f..2fab2570f 100644 --- a/src/core/CMakeLists.txt +++ b/src/core/CMakeLists.txt @@ -134,6 +134,7 @@ set(HEADERS              arm/skyeye_common/arm_regformat.h              arm/skyeye_common/armdefs.h              arm/skyeye_common/armmmu.h +            arm/skyeye_common/armsupp.h              arm/skyeye_common/vfp/asm_vfp.h              arm/skyeye_common/vfp/vfp.h              arm/skyeye_common/vfp/vfp_helper.h diff --git a/src/core/arm/dyncom/arm_dyncom.cpp b/src/core/arm/dyncom/arm_dyncom.cpp index 529c4ac70..60a1dcf66 100644 --- a/src/core/arm/dyncom/arm_dyncom.cpp +++ b/src/core/arm/dyncom/arm_dyncom.cpp @@ -7,6 +7,7 @@  #include "common/make_unique.h"  #include "core/arm/skyeye_common/armdefs.h" +#include "core/arm/skyeye_common/armsupp.h"  #include "core/arm/skyeye_common/vfp/vfp.h"  #include "core/arm/dyncom/arm_dyncom.h" diff --git a/src/core/arm/dyncom/arm_dyncom_dec.cpp b/src/core/arm/dyncom/arm_dyncom_dec.cpp index 697be9556..3ab9f2c17 100644 --- a/src/core/arm/dyncom/arm_dyncom_dec.cpp +++ b/src/core/arm/dyncom/arm_dyncom_dec.cpp @@ -2,8 +2,8 @@  // Licensed under GPLv2 or any later version  // Refer to the license.txt file included. -#include "core/arm/skyeye_common/armdefs.h"  #include "core/arm/dyncom/arm_dyncom_dec.h" +#include "core/arm/skyeye_common/armsupp.h"  const ISEITEM arm_instruction[] = {      { "vmla", 4, ARMVFP2,      { 23, 27, 0x1C, 20, 21, 0x0, 9, 11, 0x5, 4, 4, 0 }}, @@ -414,7 +414,7 @@ const ISEITEM arm_exclusion_code[] = {      { "invalid", 0, INVALID,     { 0 }}  }; -int decode_arm_instr(uint32_t instr, int32_t *idx) { +int decode_arm_instr(u32 instr, s32* idx) {      int n = 0;      int base = 0;      int ret = DECODE_FAILURE; diff --git a/src/core/arm/dyncom/arm_dyncom_dec.h b/src/core/arm/dyncom/arm_dyncom_dec.h index 4b5f5ad7e..5f6279627 100644 --- a/src/core/arm/dyncom/arm_dyncom_dec.h +++ b/src/core/arm/dyncom/arm_dyncom_dec.h @@ -4,7 +4,9 @@  #pragma once -int decode_arm_instr(uint32_t instr, int32_t *idx); +#include "common/common_types.h" + +int decode_arm_instr(u32 instr, s32* idx);  enum DECODE_STATUS {      DECODE_SUCCESS, diff --git a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp index 785f39566..d9db0daa0 100644 --- a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp +++ b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp @@ -19,6 +19,7 @@  #include "core/arm/dyncom/arm_dyncom_run.h"  #include "core/arm/skyeye_common/armdefs.h"  #include "core/arm/skyeye_common/armmmu.h" +#include "core/arm/skyeye_common/armsupp.h"  #include "core/arm/skyeye_common/vfp/vfp.h"  Common::Profiling::TimingCategory profile_execute("DynCom::Execute"); diff --git a/src/core/arm/dyncom/arm_dyncom_thumb.cpp b/src/core/arm/dyncom/arm_dyncom_thumb.cpp index f10a5b70f..13cc34be4 100644 --- a/src/core/arm/dyncom/arm_dyncom_thumb.cpp +++ b/src/core/arm/dyncom/arm_dyncom_thumb.cpp @@ -6,6 +6,7 @@  // ARM instruction, and using the existing ARM simulator.  #include "core/arm/dyncom/arm_dyncom_thumb.h" +#include "core/arm/skyeye_common/armsupp.h"  // Decode a 16bit Thumb instruction.  The instruction is in the low 16-bits of the tinstr field,  // with the following Thumb instruction held in the high 16-bits.  Passing in two Thumb instructions diff --git a/src/core/arm/skyeye_common/armdefs.h b/src/core/arm/skyeye_common/armdefs.h index a0ec108c7..f183b5098 100644 --- a/src/core/arm/skyeye_common/armdefs.h +++ b/src/core/arm/skyeye_common/armdefs.h @@ -22,9 +22,6 @@  #include "common/common_types.h"  #include "core/arm/skyeye_common/arm_regformat.h" -#define BITS(s, a, b) ((s << ((sizeof(s) * 8 - 1) - b)) >> (sizeof(s) * 8 - b + a - 1)) -#define BIT(s, n) ((s >> (n)) & 1) -  // Signal levels  enum {      LOW     = 0, @@ -47,9 +44,6 @@ enum {      ABORT_BASE_UPDATED  = 2  }; -#define POS(i) ( (~(i)) >> 31 ) -#define NEG(i) ( (i) >> 31 ) -  typedef u64 ARMdword;  // must be 64 bits wide  typedef u32 ARMword;   // must be 32 bits wide  typedef u16 ARMhword;  // must be 16 bits wide @@ -288,31 +282,3 @@ enum {  	ONCE       = 2, // Execute just one iteration  	RUN        = 3  // Continuous execution  }; - - -bool AddOverflow(ARMword, ARMword, ARMword); -bool SubOverflow(ARMword, ARMword, ARMword); - -void ARMul_SelectProcessor(ARMul_State*, unsigned); - -u32 AddWithCarry(u32, u32, u32, bool*, bool*); -bool ARMul_AddOverflowQ(ARMword, ARMword); - -u8 ARMul_SignedSaturatedAdd8(u8, u8); -u8 ARMul_SignedSaturatedSub8(u8, u8); -u16 ARMul_SignedSaturatedAdd16(u16, u16); -u16 ARMul_SignedSaturatedSub16(u16, u16); - -u8 ARMul_UnsignedSaturatedAdd8(u8, u8); -u16 ARMul_UnsignedSaturatedAdd16(u16, u16); -u8 ARMul_UnsignedSaturatedSub8(u8, u8); -u16 ARMul_UnsignedSaturatedSub16(u16, u16); -u8 ARMul_UnsignedAbsoluteDifference(u8, u8); -u32 ARMul_SignedSatQ(s32, u8, bool*); -u32 ARMul_UnsignedSatQ(s32, u8, bool*); - -bool InBigEndianMode(ARMul_State*); -bool InAPrivilegedMode(ARMul_State*); - -u32 ReadCP15Register(ARMul_State* cpu, u32 crn, u32 opcode_1, u32 crm, u32 opcode_2); -void WriteCP15Register(ARMul_State* cpu, u32 value, u32 crn, u32 opcode_1, u32 crm, u32 opcode_2); diff --git a/src/core/arm/skyeye_common/armmmu.h b/src/core/arm/skyeye_common/armmmu.h index c67d7209b..6aa2e0771 100644 --- a/src/core/arm/skyeye_common/armmmu.h +++ b/src/core/arm/skyeye_common/armmmu.h @@ -24,6 +24,7 @@  #include "core/memory.h"  #include "core/arm/skyeye_common/armdefs.h" +#include "core/arm/skyeye_common/armsupp.h"  // Register numbers in the MMU  enum diff --git a/src/core/arm/skyeye_common/armsupp.cpp b/src/core/arm/skyeye_common/armsupp.cpp index 83f7f3e2c..e1d4509c4 100644 --- a/src/core/arm/skyeye_common/armsupp.cpp +++ b/src/core/arm/skyeye_common/armsupp.cpp @@ -18,8 +18,9 @@  #include "common/logging/log.h"  #include "core/mem_map.h" -#include "core/arm/skyeye_common/armdefs.h"  #include "core/arm/skyeye_common/arm_regformat.h" +#include "core/arm/skyeye_common/armdefs.h" +#include "core/arm/skyeye_common/armsupp.h"  // Unsigned sum of absolute difference  u8 ARMul_UnsignedAbsoluteDifference(u8 left, u8 right) @@ -47,21 +48,21 @@ u32 AddWithCarry(u32 left, u32 right, u32 carry_in, bool* carry_out_occurred, bo  }  // Compute whether an addition of A and B, giving RESULT, overflowed. -bool AddOverflow(ARMword a, ARMword b, ARMword result) +bool AddOverflow(u32 a, u32 b, u32 result)  {      return ((NEG(a) && NEG(b) && POS(result)) ||              (POS(a) && POS(b) && NEG(result)));  }  // Compute whether a subtraction of A and B, giving RESULT, overflowed. -bool SubOverflow(ARMword a, ARMword b, ARMword result) +bool SubOverflow(u32 a, u32 b, u32 result)  {      return ((NEG(a) && POS(b) && POS(result)) ||              (POS(a) && NEG(b) && NEG(result)));  }  // Returns true if the Q flag should be set as a result of overflow. -bool ARMul_AddOverflowQ(ARMword a, ARMword b) +bool ARMul_AddOverflowQ(u32 a, u32 b)  {      u32 result = a + b;      if (((result ^ a) & (u32)0x80000000) && ((a ^ b) & (u32)0x80000000) == 0) diff --git a/src/core/arm/skyeye_common/armsupp.h b/src/core/arm/skyeye_common/armsupp.h new file mode 100644 index 000000000..d82b21107 --- /dev/null +++ b/src/core/arm/skyeye_common/armsupp.h @@ -0,0 +1,42 @@ +// Copyright 2014 Citra Emulator Project +// Licensed under GPLv2 or any later version +// Refer to the license.txt file included. + +#pragma once + +#include "common/common_types.h" + +struct ARMul_State; + +#define BITS(s, a, b) ((s << ((sizeof(s) * 8 - 1) - b)) >> (sizeof(s) * 8 - b + a - 1)) +#define BIT(s, n) ((s >> (n)) & 1) + +#define POS(i) ( (~(i)) >> 31 ) +#define NEG(i) ( (i) >> 31 ) + +bool AddOverflow(u32, u32, u32); +bool SubOverflow(u32, u32, u32); + +void ARMul_SelectProcessor(ARMul_State*, unsigned); + +u32 AddWithCarry(u32, u32, u32, bool*, bool*); +bool ARMul_AddOverflowQ(u32, u32); + +u8 ARMul_SignedSaturatedAdd8(u8, u8); +u8 ARMul_SignedSaturatedSub8(u8, u8); +u16 ARMul_SignedSaturatedAdd16(u16, u16); +u16 ARMul_SignedSaturatedSub16(u16, u16); + +u8 ARMul_UnsignedSaturatedAdd8(u8, u8); +u16 ARMul_UnsignedSaturatedAdd16(u16, u16); +u8 ARMul_UnsignedSaturatedSub8(u8, u8); +u16 ARMul_UnsignedSaturatedSub16(u16, u16); +u8 ARMul_UnsignedAbsoluteDifference(u8, u8); +u32 ARMul_SignedSatQ(s32, u8, bool*); +u32 ARMul_UnsignedSatQ(s32, u8, bool*); + +bool InBigEndianMode(ARMul_State*); +bool InAPrivilegedMode(ARMul_State*); + +u32 ReadCP15Register(ARMul_State* cpu, u32 crn, u32 opcode_1, u32 crm, u32 opcode_2); +void WriteCP15Register(ARMul_State* cpu, u32 value, u32 crn, u32 opcode_1, u32 crm, u32 opcode_2);  | 
