summaryrefslogtreecommitdiff
path: root/src/core/arm/nce
AgeCommit message (Collapse)Author
2025-03-06revert 31694994f2c338486486efb7d8bc5e954b8a9e07Zephyron
revert arm_nce: Hash TLB to MLP L2 Update
2025-03-06revert ee3d858935600e23a7914620b21f45082cccf8bdZephyron
revert Follow Up Of the previous commit with the update of TLB update
2025-03-06revert 6565055865688ba316801d99a3c3a5a0300cad5dZephyron
revert Fix: Core_Memory logging and ARM_NCE Mutex logging
2025-03-05Fix: Core_Memory logging and ARM_NCE Mutex loggingCamilleLaVey
2025-03-04Follow Up Of the previous commit with the update of TLB updateCamilleLaVey
2025-03-04arm_nce: Hash TLB to MLP L2 UpdateCamilleLaVey
2025-03-04revert e4342324fe4ef63ef48a15ac379063ab8c7fa7aeCamilleLaVey
revert Changes of the previous commits
2025-03-03Changes of the previous commitsCamilleLaVey
2025-02-28arm: Improve TLB implementation and fault handling in NCEZephyron
This commit enhances the Translation Lookaside Buffer (TLB) implementation in the ARM Native Code Execution (NCE) component to increase stability, particularly on Android devices. The changes prioritize robustness and error recovery over performance optimizations. Key improvements: - Replace set-associative TLB with a simpler linear search implementation - Implement a basic LRU replacement policy for TLB entries - Add validation checks for memory addresses before TLB insertion - Ensure proper page alignment for guest and host addresses - Enhance alignment fault handling with instruction skipping as fallback - Add comprehensive debug logging for memory access errors - Improve error recovery in guest memory access scenarios These changes should significantly reduce crashes during emulation on Android devices by gracefully handling memory access edge cases that previously resulted in hard crashes. Co-Authored-By: Camille LaVey <camillelavey@citron-emu.org> Signed-off-by: Zephyron <zephyron@citron-emu.org>
2025-02-25core/arm/nce: Implement TLB caching systemZephyron
Adds a software TLB cache to improve memory access performance in the NCE (Native Code Execution) system. Key changes include: - Implement set-associative TLB with 64 sets and 8 ways - Add TLB lookup before memory access in HandleGuestAccessFault - Implement LRU replacement policy with access frequency consideration - Add thread context caching to reduce overhead - Add proper synchronization with mutex locks - Add helper functions for TLB management (lookup, insert, invalidate) This change should improve performance by reducing redundant memory translations and providing faster access to frequently used pages.
2025-01-14Revert incorrect copyright attribution for non-contributed filesZephyron
- In commit b3facaa6bb30cdc39f2b7d632fef1e3bfeee7785, the copyright header was updated to include "Citron Homebrew Project" across multiple files, regardless of whether any contributions were made. - This commit removes the incorrect attribution and reverts the copyright header to its previous state. - Copyright attribution should only be added when meaningful contributions have been made to the file. - This commit ensures proper compliance with copyright standards and maintains correct attribution to the respective contributors. - Special thanks to Tachi for pointing out the need for these corrections and ensuring that proper attribution practices are followed.
2024-12-31chore: update project references and add Citron copyrightZephyron
- Replaced all references to the old project name with Citron. - Added Citron copyright information alongside existing notices in all files.
2024-01-15core: Support multiple modules per patcherGPUCode
2023-12-20Merge pull request #12417 from liamwhite/arm64-gcc-fixFernando S
nce: hide shadowing warnings from dynarmic headers
2023-12-20nce: hide shadowing warnings from dynarmic headersLiam
2023-12-19nce: increase handler stack sizeLiam
2023-12-19nce: fix read size in simd immediate emulationLiam
2023-12-11nce: adjust initialization for repeated callsLiam
2023-12-10nce: implement instruction emulation for misaligned memory accessesLiam
2023-12-06Merge pull request #12236 from liamwhite/cpu-refactorFernando S
core: refactor emulated cpu core activation
2023-12-04core: refactor emulated cpu core activationLiam
2023-12-02nce: fix pre-text patch for single modulesLiam
2023-11-29core: Rename patcher fileGPUCode
2023-11-25oaknut: Address warningsGPUCode
2023-11-25Address more review commentsGPUCode
2023-11-25arm_nce: skip data aborts for crash handling parityLiam
2023-11-25patch: check offsets from first code wordLiam
2023-11-25arm_nce: skip dc cvac on possibly write-protected areasLiam
2023-11-25Address some review commentsGPUCode
2023-11-25arm: Implement native code execution backendLiam