From 83bc1a3120e124a13c397bac205ed46fe4a386a0 Mon Sep 17 00:00:00 2001 From: Lioncash Date: Fri, 30 Jan 2015 15:52:58 -0500 Subject: arm: Get rid of armcpu.h and skyeye_types.h --- src/core/arm/dyncom/arm_dyncom.cpp | 1 - src/core/arm/dyncom/arm_dyncom_run.h | 2 -- src/core/arm/dyncom/arm_dyncom_thumb.h | 1 - 3 files changed, 4 deletions(-) (limited to 'src/core/arm/dyncom') diff --git a/src/core/arm/dyncom/arm_dyncom.cpp b/src/core/arm/dyncom/arm_dyncom.cpp index 9c4cc90f2..01ffbcc87 100644 --- a/src/core/arm/dyncom/arm_dyncom.cpp +++ b/src/core/arm/dyncom/arm_dyncom.cpp @@ -2,7 +2,6 @@ // Licensed under GPLv2 or any later version // Refer to the license.txt file included. -#include "core/arm/skyeye_common/armcpu.h" #include "core/arm/skyeye_common/armemu.h" #include "core/arm/skyeye_common/vfp/vfp.h" diff --git a/src/core/arm/dyncom/arm_dyncom_run.h b/src/core/arm/dyncom/arm_dyncom_run.h index c70522274..c477002b0 100644 --- a/src/core/arm/dyncom/arm_dyncom_run.h +++ b/src/core/arm/dyncom/arm_dyncom_run.h @@ -19,8 +19,6 @@ #ifndef __ARM_DYNCOM_RUN__ #define __ARM_DYNCOM_RUN__ -#include "core/arm/skyeye_common/skyeye_types.h" - void switch_mode(arm_core_t *core, uint32_t mode); /* FIXME, we temporarily think thumb instruction is always 16 bit */ diff --git a/src/core/arm/dyncom/arm_dyncom_thumb.h b/src/core/arm/dyncom/arm_dyncom_thumb.h index bf69b2fd4..7ca8062bf 100644 --- a/src/core/arm/dyncom/arm_dyncom_thumb.h +++ b/src/core/arm/dyncom/arm_dyncom_thumb.h @@ -28,7 +28,6 @@ #define __ARM_DYNCOM_THUMB_H__ #include "core/arm/skyeye_common/armdefs.h" -#include "core/arm/skyeye_common/skyeye_types.h" enum tdstate { t_undefined, // Undefined Thumb instruction -- cgit v1.2.3 From fc1a9e35fb995275176b49ff3a3250d1f29226ca Mon Sep 17 00:00:00 2001 From: Lioncash Date: Fri, 30 Jan 2015 15:58:45 -0500 Subject: arm: Move headers over to pragma once --- src/core/arm/dyncom/arm_dyncom_run.h | 5 +---- src/core/arm/dyncom/arm_dyncom_thumb.h | 5 +---- 2 files changed, 2 insertions(+), 8 deletions(-) (limited to 'src/core/arm/dyncom') diff --git a/src/core/arm/dyncom/arm_dyncom_run.h b/src/core/arm/dyncom/arm_dyncom_run.h index c477002b0..b1c0daaf7 100644 --- a/src/core/arm/dyncom/arm_dyncom_run.h +++ b/src/core/arm/dyncom/arm_dyncom_run.h @@ -16,8 +16,7 @@ * */ -#ifndef __ARM_DYNCOM_RUN__ -#define __ARM_DYNCOM_RUN__ +#pragma once void switch_mode(arm_core_t *core, uint32_t mode); @@ -49,5 +48,3 @@ static inline addr_t CHECK_READ_REG15_WA(arm_core_t* core, int Rn) { static inline u32 CHECK_READ_REG15(arm_core_t* core, int Rn) { return (Rn == 15)? ((core->Reg[15] & ~0x1) + GET_INST_SIZE(core) * 2) : core->Reg[Rn]; } - -#endif diff --git a/src/core/arm/dyncom/arm_dyncom_thumb.h b/src/core/arm/dyncom/arm_dyncom_thumb.h index 7ca8062bf..a1785abb8 100644 --- a/src/core/arm/dyncom/arm_dyncom_thumb.h +++ b/src/core/arm/dyncom/arm_dyncom_thumb.h @@ -24,8 +24,7 @@ * @date 2011-11-07 */ -#ifndef __ARM_DYNCOM_THUMB_H__ -#define __ARM_DYNCOM_THUMB_H__ +#pragma once #include "core/arm/skyeye_common/armdefs.h" @@ -46,5 +45,3 @@ static inline u32 get_thumb_instr(u32 instr, addr_t pc) { tinstr = instr & 0xFFFF; return tinstr; } - -#endif -- cgit v1.2.3 From b6cfc48a0b1d8d139f8a51e1748b51abbbd10108 Mon Sep 17 00:00:00 2001 From: Lioncash Date: Fri, 30 Jan 2015 16:04:32 -0500 Subject: dyncom: clean up arm_dyncom_dec.h --- src/core/arm/dyncom/arm_dyncom_dec.h | 45 ++---------------------------------- 1 file changed, 2 insertions(+), 43 deletions(-) (limited to 'src/core/arm/dyncom') diff --git a/src/core/arm/dyncom/arm_dyncom_dec.h b/src/core/arm/dyncom/arm_dyncom_dec.h index 58784aeea..ee8ff5992 100644 --- a/src/core/arm/dyncom/arm_dyncom_dec.h +++ b/src/core/arm/dyncom/arm_dyncom_dec.h @@ -6,14 +6,6 @@ #define BITS(a,b) ((instr >> (a)) & ((1 << (1+(b)-(a)))-1)) #define BIT(n) ((instr >> (n)) & 1) -#define BAD do { printf("meet BAD at %s, instr is %x\n", __FUNCTION__, instr ); } while(0); -#define ptr_N cpu->ptr_N -#define ptr_Z cpu->ptr_Z -#define ptr_C cpu->ptr_C -#define ptr_V cpu->ptr_V -#define ptr_I cpu->ptr_I -#define ptr_T cpu->ptr_T -#define ptr_CPSR cpu->ptr_gpr[16] // For MUL instructions #define RDHi ((instr >> 16) & 0xF) @@ -49,24 +41,6 @@ #define SBIT BIT(20) #define DESTReg (BITS (12, 15)) -// They are in unused state, give a corrent value when using -#define IS_V5E 0 -#define IS_V5 0 -#define IS_V6 0 -#define LHSReg 0 - -// Temp define the using the pc reg need implement a flow -#define STORE_CHECK_RD_PC ADD(R(RD), CONST(INSTR_SIZE * 2)) - -#define OPERAND operand(cpu,instr,bb,NULL) -#define SCO_OPERAND(sco) operand(cpu,instr,bb,sco) -#define BOPERAND boperand(instr) - -#define CHECK_RN_PC (RN == 15 ? ADD(AND(R(RN), CONST(~0x1)), CONST(INSTR_SIZE * 2)) : R(RN)) -#define CHECK_RN_PC_WA (RN == 15 ? ADD(AND(R(RN), CONST(~0x3)), CONST(INSTR_SIZE * 2)) : R(RN)) - -#define GET_USER_MODE() (OR(ICMP_EQ(R(MODE_REG), CONST(USER32MODE)), ICMP_EQ(R(MODE_REG), CONST(SYSTEM32MODE)))) - int decode_arm_instr(uint32_t instr, int32_t *idx); enum DECODE_STATUS { @@ -83,23 +57,8 @@ struct instruction_set_encoding_item { typedef struct instruction_set_encoding_item ISEITEM; -#define RECORD_WB(value, flag) { cpu->dyncom_engine->wb_value = value;cpu->dyncom_engine->wb_flag = flag; } -#define INIT_WB(wb_value, wb_flag) RECORD_WB(wb_value, wb_flag) - -#define EXECUTE_WB(base_reg) { if(cpu->dyncom_engine->wb_flag) LET(base_reg, cpu->dyncom_engine->wb_value); } - -inline int get_reg_count(uint32_t instr) { - int i = BITS(0, 15); - int count = 0; - while (i) { - if (i & 1) - count++; - i = i >> 1; - } - return count; -} - -enum ARMVER { +// ARM versions +enum { INVALID = 0, ARMALL, ARMV4, -- cgit v1.2.3