clic driver level and priority functions2018-07-04T23:48:19+00:00Drew Barbierdbarbi1@gmail.com2018-07-04T23:48:19+00:00962b23a3797ba659577056ed3fc57c2d0a77df62
accessors for other clic registers2018-07-02T20:51:39+00:00Drew Barbierdbarbi1@gmail.com2018-07-02T20:51:39+00:00264c905f62394221215cd367b638e90c60d70808
e2 and clic start2018-07-02T05:40:06+00:00Drew Barbierdbarbi1@gmail.com2018-07-02T05:40:06+00:00abbf5a2ef4b46218a1b24ef6afd6cf7b35a87e55
Update SDK For E31/E51 Coreplex IP Evaluation2017-05-04T12:46:05+00:00Megan Wachsmegan@sifive.com2017-05-04T12:46:05+00:004d5cbec9118cbedf2d4ae5b54acaa22862245a4c
prci: Clean up the hfrosc-driven-pll FPU testing.2017-02-02T19:33:50+00:00Megan Wachsmegan@sifive.com2017-02-02T19:33:50+00:00557c3ed0dc025b73a919f3e2a4068808092f48c1
prci: Simplify the targeted f_cpu function by measuring HFROSC frequency first, then using it as the PLL source. This is also safer as it is less risk of using PLL out of its range.2017-02-02T17:56:52+00:00Megan Wachsmegan@sifive.com2017-02-02T17:56:52+00:002579554bb17038dffa9af57649c1e83e614efbc6
PRCI: This doesn't exist on the Arty and potentially other devices, so exclude it if there is not PRCI_BASE_ADDR on the system.2017-02-02T02:36:22+00:00Megan Wachsmegan@sifive.com2017-02-02T02:36:22+00:004c4c4cd044978d9f72a872b1b8f674cd6f061c1b