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author | Bunnaroath Sou <35707615+bsousi5@users.noreply.github.com> | 2019-06-05 19:25:28 -0700 |
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committer | GitHub <noreply@github.com> | 2019-06-05 19:25:28 -0700 |
commit | 7cfed3f075a8061270fb72fcf1ed3c7c46803761 (patch) | |
tree | 9959f3eb5f8d6e316c4e4011c5df7ef3a12dfc59 | |
parent | 1870b34bd69142910688f7a96b36397dae1c670d (diff) | |
parent | b599595c3429c6fe0b24b0ecb85ad94222ced675 (diff) |
Merge pull request #268 from sifive/update_coremark_readme
Update README for coremark.
-rw-r--r-- | README.md | 4 |
1 files changed, 2 insertions, 2 deletions
@@ -95,12 +95,12 @@ operating systems to RISC-V. - example-pmp - Demonstrates how to configure a Physical Memory Protection (PMP) region - sifive-welcome - - Prints the SiFive banner and blinks LEDs + - Prints the SiFive banner and blinks LEDs - dhrystone - "Dhrystone" Benchmark Program by Reinhold P. Weicker - coremark - "CoreMark" Benchmark Program that measures the performance of embedded - microcrontrollers (MCU) + microcrontrollers (MCU) Please use SiFive GNU Embedded Toolchain >= v2019.05 ### Setting up the SDK ### |