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authorHsiang-Chia.Huang <hsiangchiah@sifive.com>2019-06-04 23:06:32 -0700
committerHsiang-Chia.Huang <hsiangchiah@sifive.com>2019-06-04 23:06:32 -0700
commitb599595c3429c6fe0b24b0ecb85ad94222ced675 (patch)
tree4b4ab8faf418732818e849cec879c06f6ec75a56
parent78b48aac4add3ba3a8a46eafa2b8c8cde065d1f2 (diff)
Update README for coremark.
-rw-r--r--README.md4
1 files changed, 2 insertions, 2 deletions
diff --git a/README.md b/README.md
index d1c1a5c..65ba13b 100644
--- a/README.md
+++ b/README.md
@@ -95,12 +95,12 @@ operating systems to RISC-V.
- example-pmp
- Demonstrates how to configure a Physical Memory Protection (PMP) region
- sifive-welcome
- - Prints the SiFive banner and blinks LEDs
+ - Prints the SiFive banner and blinks LEDs
- dhrystone
- "Dhrystone" Benchmark Program by Reinhold P. Weicker
- coremark
- "CoreMark" Benchmark Program that measures the performance of embedded
- microcrontrollers (MCU)
+ microcrontrollers (MCU) Please use SiFive GNU Embedded Toolchain >= v2019.05
### Setting up the SDK ###