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authorhsiang-chia.huang <hsiangchia.huang@sifive.com>2019-05-24 10:25:58 +0800
committerGitHub <noreply@github.com>2019-05-24 10:25:58 +0800
commit869ef0c1a2282f52500c4004224c9c9b196626b9 (patch)
tree3996d52a748ae2420b5c9c6c9efe4158d5dece53 /FreedomStudio/E2FPGA/dhrystone/.cproject
parent2c0269905929128bd0bd13a55ae3d8afd60a1af6 (diff)
parentfaf58a49c3b6421107ada0e8af43170a5ffafcea (diff)
Merge pull request #255 from sifive/dhrystone_19.05
Setup default options for dhrystone release.
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