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authorAndrew Waterman <andrew@sifive.com>2017-01-03 17:45:07 -0800
committerAndrew Waterman <andrew@sifive.com>2017-01-03 18:02:42 -0800
commit2398dfda399f445cf114e29b61d9331fddb09b4e (patch)
tree407c63990049b4fa853aedebb4a20bd5ef5cc333 /FreedomStudio/E31FPGA/performance_counters
parentb1f048f991e7d743e46be9c48c73d00a843f400c (diff)
Improve HiFive1 CPU frequency measurement routine
- Warm up I$ first. - Correct for integer division truncation error. - Wait for an RTC clock edge before starting the timing loop, which removes an error proportional to the number of loop iterations, allowing us to run for far less time.
Diffstat (limited to 'FreedomStudio/E31FPGA/performance_counters')
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