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authorBunnaroath Sou <35707615+bsousi5@users.noreply.github.com>2019-01-14 13:52:20 -0800
committerGitHub <noreply@github.com>2019-01-14 13:52:20 -0800
commitb230f15ed26097d29ec2e2e3e6974587a259dcb4 (patch)
treebb521c9666e6f0b07930be44f90b4d7f9649e9cd /FreedomStudio/E31FPGA/vectored_interrupts/.project
parentb4f60121cf7d7b9df255fa263ba543b2860117c9 (diff)
parent8db046c7c6ba029ac011e9e135dd936665cfe1fd (diff)
Merge pull request #147 from sifive/pass-fail
Simple RTL example returning pass and fail
Diffstat (limited to 'FreedomStudio/E31FPGA/vectored_interrupts/.project')
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