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author | Megan Wachs <megan@sifive.com> | 2016-12-09 17:29:16 -0800 |
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committer | GitHub <noreply@github.com> | 2016-12-09 17:29:16 -0800 |
commit | 7b9f876e2584e277accb2f38488fc0cfadcb6387 (patch) | |
tree | 81fc4b0ef94dfa74c0db3a09d383dded5f9ab53b /FreedomStudio/E51FPGA/dhrystone/sifive-coreplexip-e51-arty.cfg | |
parent | 7011ca48a2ef9205184a03a854ba310ebcda0e40 (diff) | |
parent | a68a562a49da111ff722a1651dd6f74604d3247b (diff) |
Merge pull request #20 from sifive/trap_entry
demo_gpio: Correct trap_entry handling to enable timer/ext interrupts
Diffstat (limited to 'FreedomStudio/E51FPGA/dhrystone/sifive-coreplexip-e51-arty.cfg')
0 files changed, 0 insertions, 0 deletions