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authorAlbert Ou <albert@sifive.com>2016-12-07 15:06:20 -0800
committerAlbert Ou <albert@sifive.com>2016-12-07 15:06:20 -0800
commit9ad15e8896557e9526a12e868801ed5e7d320298 (patch)
treebde92769a52112aa6e4f4246e247ddf735bdcb4d /FreedomStudio/E51FPGA/dhrystone/sifive-coreplexip-e51-arty.cfg
parentfb1d8d0dcc27f3460b3e18f6b62832f6568e0214 (diff)
Place .init_array/.fini_array sections in flash instead of RAM
This appears to resolve the issue of .sdata being assigned an incorrect LMA (ld warning "section `.sdata' can't be allocated in segment 1").
Diffstat (limited to 'FreedomStudio/E51FPGA/dhrystone/sifive-coreplexip-e51-arty.cfg')
0 files changed, 0 insertions, 0 deletions