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authorPalmer Dabbelt <palmer@dabbelt.com>2017-06-10 13:20:01 -0700
committerPalmer Dabbelt <palmer@dabbelt.com>2017-06-10 13:20:01 -0700
commit9cb0177cdf178e7f941341b98bf85289c6b30b1f (patch)
tree4bd296adf318a7df6ae59cbe77dc8e060ba60de7 /FreedomStudio/E51FPGA/dhrystone/sifive-coreplexip-e51-arty.cfg
parent4fbbeee0d970ec86ab5b100461104a1db7be746d (diff)
Just lump all the RAM sections together
Since our loader doesn't support multiple sections anyway, there's really no reason to have all these sections floating around. They're causing trouble due to misalignment so it's easiest to just group them together so we can properly enforce alignment.
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