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| author | Megan Wachs <megan@sifive.com> | 2017-05-04 05:50:00 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2017-05-04 05:49:59 -0700 |
| commit | 5b2498467020616de013fd557b6a1e685544ee18 (patch) | |
| tree | bb197ca9ef8f9265a79485f3a13e4e921a0ff93b /FreedomStudio/HiFive1/hello/openocd.cfg | |
| parent | 3a01ac1b7c0e72c04679f0cd6552c4ff0b308863 (diff) | |
| parent | 4d5cbec9118cbedf2d4ae5b54acaa22862245a4c (diff) | |
Merge pull request #54 from sifive/tag_v20170504
Update SDK For E31/E51 Coreplex IP Evaluation
Diffstat (limited to 'FreedomStudio/HiFive1/hello/openocd.cfg')
| -rw-r--r-- | FreedomStudio/HiFive1/hello/openocd.cfg | 34 |
1 files changed, 34 insertions, 0 deletions
diff --git a/FreedomStudio/HiFive1/hello/openocd.cfg b/FreedomStudio/HiFive1/hello/openocd.cfg new file mode 100644 index 0000000..b0a8e26 --- /dev/null +++ b/FreedomStudio/HiFive1/hello/openocd.cfg @@ -0,0 +1,34 @@ +adapter_khz 10000 + +interface ftdi +ftdi_device_desc "Dual RS232-HS" +ftdi_vid_pid 0x0403 0x6010 + +ftdi_layout_init 0x0008 0x001b +ftdi_layout_signal nSRST -oe 0x0020 -data 0x0020 + +#Reset Stretcher logic on FE310 is ~1 second long +#This doesn't apply if you use +# ftdi_set_signal, but still good to document +#adapter_nsrst_delay 1500 + +set _CHIPNAME riscv +jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x10e31913 + +set _TARGETNAME $_CHIPNAME.cpu +target create $_TARGETNAME riscv -chain-position $_TARGETNAME +$_TARGETNAME configure -work-area-phys 0x80000000 -work-area-size 10000 -work-area-backup 1 + +flash bank onboard_spi_flash fespi 0x20000000 0 0 0 $_TARGETNAME +init +#reset -- This type of reset is not implemented yet +if {[ info exists pulse_srst]} { + ftdi_set_signal nSRST 0 + ftdi_set_signal nSRST z + #Wait for the reset stretcher + #It will work without this, but + #will incur lots of delays for later commands. + sleep 1500 +} +halt +flash protect 0 64 last off |