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| author | Bunnaroath Sou <35707615+bsousi5@users.noreply.github.com> | 2019-05-20 14:39:42 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2019-05-20 14:39:42 -0700 |
| commit | 615a076df87a021c07e6e3bfecca3ad4f27a76bb (patch) | |
| tree | 8012100cd786c31074d8bef0a8c5e699c4f1e3e5 /bsp/coreip-e20-arty/settings.mk | |
| parent | 44c4b9b6383f788fd29de5852cc645f0c76687a4 (diff) | |
| parent | 6af51ca7b09c8e5b7e1933700b1d855893ca42b1 (diff) | |
Merge pull request #240 from sifive/inline-fnvec
Updating BSP to pickup FDT inline support for generates metal files
Diffstat (limited to 'bsp/coreip-e20-arty/settings.mk')
| -rw-r--r-- | bsp/coreip-e20-arty/settings.mk | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/bsp/coreip-e20-arty/settings.mk b/bsp/coreip-e20-arty/settings.mk index c28ec0c..5a405fe 100644 --- a/bsp/coreip-e20-arty/settings.mk +++ b/bsp/coreip-e20-arty/settings.mk @@ -1,3 +1,9 @@ +# Copyright 2019 SiFive, Inc # +# SPDX-License-Identifier: Apache-2.0 # +# ----------------------------------- # +# [XXXXX] 20-05-2019 14-26-09 # +# ----------------------------------- # + RISCV_ARCH=rv32imc RISCV_ABI=ilp32 RISCV_CMODEL=medlow |