diff options
| author | Nathaniel Graff <nathaniel.graff@sifive.com> | 2019-05-22 17:53:09 +0000 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2019-05-22 17:53:09 +0000 |
| commit | 44deff8b8d615721c11ab5f408da73030b01d0f9 (patch) | |
| tree | 34cd2bb52009a596dc8de95bf2b7262f5a6ce3f9 /bsp/coreip-e20-rtl | |
| parent | 9946f2062837098088e4c9701614a2eeffaa921b (diff) | |
| parent | c5dd42c68d030a356c85bb8d174296b4f2df615d (diff) | |
Merge pull request #254 from sifive/dts-pmpregions
Update to new-style riscv,pmpregions property
Diffstat (limited to 'bsp/coreip-e20-rtl')
| -rw-r--r-- | bsp/coreip-e20-rtl/metal-inline.h | 3 | ||||
| -rw-r--r-- | bsp/coreip-e20-rtl/metal-platform.h | 2 | ||||
| -rw-r--r-- | bsp/coreip-e20-rtl/metal.default.lds | 2 | ||||
| -rw-r--r-- | bsp/coreip-e20-rtl/metal.h | 12 | ||||
| -rw-r--r-- | bsp/coreip-e20-rtl/metal.ramrodata.lds | 2 | ||||
| -rw-r--r-- | bsp/coreip-e20-rtl/metal.scratchpad.lds | 2 | ||||
| -rw-r--r-- | bsp/coreip-e20-rtl/settings.mk | 2 |
7 files changed, 18 insertions, 7 deletions
diff --git a/bsp/coreip-e20-rtl/metal-inline.h b/bsp/coreip-e20-rtl/metal-inline.h index 1f2399d..5bd0417 100644 --- a/bsp/coreip-e20-rtl/metal-inline.h +++ b/bsp/coreip-e20-rtl/metal-inline.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 20-05-2019 14-26-09 */ +/* [XXXXX] 21-05-2019 10-54-34 */ /* ----------------------------------- */ #ifndef ASSEMBLY @@ -24,6 +24,7 @@ /* --------------------- cpu ------------ */ extern inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu); extern inline struct metal_interrupt * __metal_driver_cpu_interrupt_controller(struct metal_cpu *cpu); +extern inline int __metal_driver_cpu_num_pmp_regions(struct metal_cpu *cpu); /* --------------------- sifive_plic0 ------------ */ diff --git a/bsp/coreip-e20-rtl/metal-platform.h b/bsp/coreip-e20-rtl/metal-platform.h index b4f13ec..02b0ad9 100644 --- a/bsp/coreip-e20-rtl/metal-platform.h +++ b/bsp/coreip-e20-rtl/metal-platform.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 20-05-2019 14-26-09 */ +/* [XXXXX] 21-05-2019 10-54-34 */ /* ----------------------------------- */ #ifndef COREIP_E20_RTL__METAL_PLATFORM_H diff --git a/bsp/coreip-e20-rtl/metal.default.lds b/bsp/coreip-e20-rtl/metal.default.lds index c95e179..af982c6 100644 --- a/bsp/coreip-e20-rtl/metal.default.lds +++ b/bsp/coreip-e20-rtl/metal.default.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 20-05-2019 14-26-09 */ +/* [XXXXX] 21-05-2019 10-54-34 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") diff --git a/bsp/coreip-e20-rtl/metal.h b/bsp/coreip-e20-rtl/metal.h index 68d33ad..1f38a0f 100644 --- a/bsp/coreip-e20-rtl/metal.h +++ b/bsp/coreip-e20-rtl/metal.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 20-05-2019 14-26-09 */ +/* [XXXXX] 21-05-2019 10-54-34 */ /* ----------------------------------- */ #ifndef ASSEMBLY @@ -117,6 +117,16 @@ static inline struct metal_interrupt * __metal_driver_cpu_interrupt_controller(s } } +static inline int __metal_driver_cpu_num_pmp_regions(struct metal_cpu *cpu) +{ + if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { + return 0; + } + else { + return 0; + } +} + /* --------------------- sifive_plic0 ------------ */ diff --git a/bsp/coreip-e20-rtl/metal.ramrodata.lds b/bsp/coreip-e20-rtl/metal.ramrodata.lds index 02f50c8..782640e 100644 --- a/bsp/coreip-e20-rtl/metal.ramrodata.lds +++ b/bsp/coreip-e20-rtl/metal.ramrodata.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 20-05-2019 14-26-09 */ +/* [XXXXX] 21-05-2019 10-54-34 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") diff --git a/bsp/coreip-e20-rtl/metal.scratchpad.lds b/bsp/coreip-e20-rtl/metal.scratchpad.lds index c95e179..af982c6 100644 --- a/bsp/coreip-e20-rtl/metal.scratchpad.lds +++ b/bsp/coreip-e20-rtl/metal.scratchpad.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 20-05-2019 14-26-09 */ +/* [XXXXX] 21-05-2019 10-54-34 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") diff --git a/bsp/coreip-e20-rtl/settings.mk b/bsp/coreip-e20-rtl/settings.mk index 6520e6d..8c8cfc0 100644 --- a/bsp/coreip-e20-rtl/settings.mk +++ b/bsp/coreip-e20-rtl/settings.mk @@ -1,7 +1,7 @@ # Copyright 2019 SiFive, Inc # # SPDX-License-Identifier: Apache-2.0 # # ----------------------------------- # -# [XXXXX] 20-05-2019 14-26-09 # +# [XXXXX] 21-05-2019 10-54-34 # # ----------------------------------- # RISCV_ARCH=rv32imc |