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| author | Silvan Jegen <s.jegen@gmail.com> | 2019-08-24 16:45:22 +0200 |
|---|---|---|
| committer | Silvan Jegen <s.jegen@gmail.com> | 2019-08-24 16:45:22 +0200 |
| commit | 71809c8c794e22d80559671c06fa2e6db8e2df60 (patch) | |
| tree | 34c719ce82134d58352e6975ad5b30aadb548844 /bsp/coreip-e20-rtl | |
| parent | 3c1be20f6c13ec70083dfad1dcb007f9c2ffef78 (diff) | |
setup_timer_irq: load ISR with correct instruction
We also make sure that the alignment of the ISR is correct. Thanks to
the internet for this one as well!
Diffstat (limited to 'bsp/coreip-e20-rtl')
0 files changed, 0 insertions, 0 deletions