Merge branch 'development-19.05' into dhrystone_19.05

7 files changed, 32 insertions, 7 deletions

diff --git a/bsp/coreip-e20-rtl/metal-inline.h b/bsp/coreip-e20-rtl/metal-inline.h
index 1f2399d..a896131 100644
--- a/bsp/coreip-e20-rtl/metal-inline.h
+++ b/bsp/coreip-e20-rtl/metal-inline.h
@@ -1,7 +1,7 @@
 /* Copyright 2019 SiFive, Inc */
 /* SPDX-License-Identifier: Apache-2.0 */
 /* ----------------------------------- */
-/* [XXXXX] 20-05-2019 14-26-09        */
+/* [XXXXX] 23-05-2019 13-29-49        */
 /* ----------------------------------- */
 
 #ifndef ASSEMBLY
@@ -22,8 +22,10 @@
 
 
 /* --------------------- cpu ------------ */
+extern inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu);
 extern inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu);
 extern inline struct metal_interrupt * __metal_driver_cpu_interrupt_controller(struct metal_cpu *cpu);
+extern inline int __metal_driver_cpu_num_pmp_regions(struct metal_cpu *cpu);
 
 
 /* --------------------- sifive_plic0 ------------ */
diff --git a/bsp/coreip-e20-rtl/metal-platform.h b/bsp/coreip-e20-rtl/metal-platform.h
index b4f13ec..4aa40ea 100644
--- a/bsp/coreip-e20-rtl/metal-platform.h
+++ b/bsp/coreip-e20-rtl/metal-platform.h
@@ -1,7 +1,7 @@
 /* Copyright 2019 SiFive, Inc */
 /* SPDX-License-Identifier: Apache-2.0 */
 /* ----------------------------------- */
-/* [XXXXX] 20-05-2019 14-26-09        */
+/* [XXXXX] 23-05-2019 13-29-49        */
 /* ----------------------------------- */
 
 #ifndef COREIP_E20_RTL__METAL_PLATFORM_H
diff --git a/bsp/coreip-e20-rtl/metal.default.lds b/bsp/coreip-e20-rtl/metal.default.lds
index c95e179..7937b08 100644
--- a/bsp/coreip-e20-rtl/metal.default.lds
+++ b/bsp/coreip-e20-rtl/metal.default.lds
@@ -1,7 +1,7 @@
 /* Copyright 2019 SiFive, Inc */
 /* SPDX-License-Identifier: Apache-2.0 */
 /* ----------------------------------- */
-/* [XXXXX] 20-05-2019 14-26-09        */
+/* [XXXXX] 23-05-2019 13-29-49        */
 /* ----------------------------------- */
 
 OUTPUT_ARCH("riscv")
@@ -27,6 +27,7 @@ SECTIONS
 	__stack_size = DEFINED(__stack_size) ? __stack_size : 0x400;
 	PROVIDE(__stack_size = __stack_size);
 	__heap_size = DEFINED(__heap_size) ? __heap_size : 0x400;
+	PROVIDE(__metal_boot_hart = 0);
 
 
 	.init 		:
diff --git a/bsp/coreip-e20-rtl/metal.h b/bsp/coreip-e20-rtl/metal.h
index 68d33ad..6749faa 100644
--- a/bsp/coreip-e20-rtl/metal.h
+++ b/bsp/coreip-e20-rtl/metal.h
@@ -1,7 +1,7 @@
 /* Copyright 2019 SiFive, Inc */
 /* SPDX-License-Identifier: Apache-2.0 */
 /* ----------------------------------- */
-/* [XXXXX] 20-05-2019 14-26-09        */
+/* [XXXXX] 23-05-2019 13-29-49        */
 /* ----------------------------------- */
 
 #ifndef ASSEMBLY
@@ -97,6 +97,16 @@ struct __metal_driver_sifive_test0 __metal_dt_teststatus_4000;
 
 
 /* --------------------- cpu ------------ */
+static inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu)
+{
+	if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) {
+		return 0;
+	}
+	else {
+		return -1;
+	}
+}
+
 static inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu)
 {
 	if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) {
@@ -117,6 +127,16 @@ static inline struct metal_interrupt * __metal_driver_cpu_interrupt_controller(s
 	}
 }
 
+static inline int __metal_driver_cpu_num_pmp_regions(struct metal_cpu *cpu)
+{
+	if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) {
+		return 0;
+	}
+	else {
+		return 0;
+	}
+}
+
 
 
 /* --------------------- sifive_plic0 ------------ */
diff --git a/bsp/coreip-e20-rtl/metal.ramrodata.lds b/bsp/coreip-e20-rtl/metal.ramrodata.lds
index 02f50c8..2343ee7 100644
--- a/bsp/coreip-e20-rtl/metal.ramrodata.lds
+++ b/bsp/coreip-e20-rtl/metal.ramrodata.lds
@@ -1,7 +1,7 @@
 /* Copyright 2019 SiFive, Inc */
 /* SPDX-License-Identifier: Apache-2.0 */
 /* ----------------------------------- */
-/* [XXXXX] 20-05-2019 14-26-09        */
+/* [XXXXX] 23-05-2019 13-29-49        */
 /* ----------------------------------- */
 
 OUTPUT_ARCH("riscv")
@@ -27,6 +27,7 @@ SECTIONS
 	__stack_size = DEFINED(__stack_size) ? __stack_size : 0x400;
 	PROVIDE(__stack_size = __stack_size);
 	__heap_size = DEFINED(__heap_size) ? __heap_size : 0x400;
+	PROVIDE(__metal_boot_hart = 0);
 
 
 	.init 		:
diff --git a/bsp/coreip-e20-rtl/metal.scratchpad.lds b/bsp/coreip-e20-rtl/metal.scratchpad.lds
index c95e179..7937b08 100644
--- a/bsp/coreip-e20-rtl/metal.scratchpad.lds
+++ b/bsp/coreip-e20-rtl/metal.scratchpad.lds
@@ -1,7 +1,7 @@
 /* Copyright 2019 SiFive, Inc */
 /* SPDX-License-Identifier: Apache-2.0 */
 /* ----------------------------------- */
-/* [XXXXX] 20-05-2019 14-26-09        */
+/* [XXXXX] 23-05-2019 13-29-49        */
 /* ----------------------------------- */
 
 OUTPUT_ARCH("riscv")
@@ -27,6 +27,7 @@ SECTIONS
 	__stack_size = DEFINED(__stack_size) ? __stack_size : 0x400;
 	PROVIDE(__stack_size = __stack_size);
 	__heap_size = DEFINED(__heap_size) ? __heap_size : 0x400;
+	PROVIDE(__metal_boot_hart = 0);
 
 
 	.init 		:
diff --git a/bsp/coreip-e20-rtl/settings.mk b/bsp/coreip-e20-rtl/settings.mk
index 26ee991..a935127 100644
--- a/bsp/coreip-e20-rtl/settings.mk
+++ b/bsp/coreip-e20-rtl/settings.mk
@@ -1,7 +1,7 @@
 # Copyright 2019 SiFive, Inc #
 # SPDX-License-Identifier: Apache-2.0 #
 # ----------------------------------- #
-# [XXXXX] 22-05-2019 00-09-02        #
+# [XXXXX] 23-05-2019 13-29-49        #
 # ----------------------------------- #
 
 RISCV_ARCH=rv32imc