diff options
author | Nathaniel Graff <nathaniel.graff@sifive.com> | 2019-04-29 14:50:24 -0700 |
---|---|---|
committer | Nathaniel Graff <nathaniel.graff@sifive.com> | 2019-05-02 11:09:59 -0700 |
commit | b555941a3d06c31e03ecf51eef608c7356bdb3b9 (patch) | |
tree | 01ff5eda110417a43bcbff9c6b76fb62a6a5191d /bsp/coreip-e21-rtl/metal-platform.h | |
parent | f45383993efe41542c0de2ca030a1ff05f765b6e (diff) |
Update BSPs for platform header
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
Diffstat (limited to 'bsp/coreip-e21-rtl/metal-platform.h')
-rw-r--r-- | bsp/coreip-e21-rtl/metal-platform.h | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/bsp/coreip-e21-rtl/metal-platform.h b/bsp/coreip-e21-rtl/metal-platform.h new file mode 100644 index 0000000..9785d80 --- /dev/null +++ b/bsp/coreip-e21-rtl/metal-platform.h @@ -0,0 +1,36 @@ +#ifndef COREIP_E21_RTL__METAL_PLATFORM_H +#define COREIP_E21_RTL__METAL_PLATFORM_H + +/* From pmp@0 */ +#define METAL_RISCV_PMP_0_NUM_REGIONS 8UL + +#define METAL_RISCV_PMP + +/* From interrupt_controller@2000000 */ +#define METAL_SIFIVE_CLIC0_2000000_BASE_ADDRESS 33554432UL +#define METAL_SIFIVE_CLIC0_2000000_SIZE 16777216UL +#define METAL_SIFIVE_CLIC0_2000000_SIFIVE_NUMINTS 143UL +#define METAL_SIFIVE_CLIC0_2000000_SIFIVE_NUMLEVELS 16UL +#define METAL_SIFIVE_CLIC0_2000000_SIFIVE_NUMINTBITS 2UL + +#define METAL_SIFIVE_CLIC0 +#define METAL_SIFIVE_CLIC0_MSIP_BASE 0UL +#define METAL_SIFIVE_CLIC0_MTIMECMP_BASE 16384UL +#define METAL_SIFIVE_CLIC0_MTIME 49144UL +#define METAL_SIFIVE_CLIC0_CLICINTIP_BASE 0UL +#define METAL_SIFIVE_CLIC0_CLICINTIE_BASE 1024UL +#define METAL_SIFIVE_CLIC0_CLICINTCTL_BASE 2048UL +#define METAL_SIFIVE_CLIC0_CLICCFG 3072UL +#define METAL_SIFIVE_CLIC0_MMODE_APERTURE 8388608UL +#define METAL_SIFIVE_CLIC0_HSMODE_APERTURE 10485760UL +#define METAL_SIFIVE_CLIC0_SMODE_APERTURE 12582912UL +#define METAL_SIFIVE_CLIC0_UMODE_APERTURE 14680064UL + +/* From teststatus@4000 */ +#define METAL_SIFIVE_TEST0_4000_BASE_ADDRESS 16384UL +#define METAL_SIFIVE_TEST0_4000_SIZE 4096UL + +#define METAL_SIFIVE_TEST0 +#define METAL_SIFIVE_TEST0_FINISHER_OFFSET 0UL + +#endif /* COREIP_E21_RTL__METAL_PLATFORM_H*/ |