diff options
author | Nathaniel Graff <nathaniel.graff@sifive.com> | 2019-05-21 10:55:10 -0700 |
---|---|---|
committer | Nathaniel Graff <nathaniel.graff@sifive.com> | 2019-05-22 10:18:50 -0700 |
commit | c5dd42c68d030a356c85bb8d174296b4f2df615d (patch) | |
tree | 34cd2bb52009a596dc8de95bf2b7262f5a6ce3f9 /bsp/coreip-e24-arty | |
parent | 7522bef945d671cccda134b686a4067782f1ffb0 (diff) |
Update BSPs
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
Diffstat (limited to 'bsp/coreip-e24-arty')
-rw-r--r-- | bsp/coreip-e24-arty/metal-inline.h | 8 | ||||
-rw-r--r-- | bsp/coreip-e24-arty/metal-platform.h | 7 | ||||
-rw-r--r-- | bsp/coreip-e24-arty/metal.default.lds | 2 | ||||
-rw-r--r-- | bsp/coreip-e24-arty/metal.h | 17 | ||||
-rw-r--r-- | bsp/coreip-e24-arty/metal.ramrodata.lds | 2 | ||||
-rw-r--r-- | bsp/coreip-e24-arty/metal.scratchpad.lds | 2 | ||||
-rw-r--r-- | bsp/coreip-e24-arty/settings.mk | 2 |
7 files changed, 20 insertions, 20 deletions
diff --git a/bsp/coreip-e24-arty/metal-inline.h b/bsp/coreip-e24-arty/metal-inline.h index bbe456e..0c359b2 100644 --- a/bsp/coreip-e24-arty/metal-inline.h +++ b/bsp/coreip-e24-arty/metal-inline.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 20-05-2019 14-26-10 */ +/* [XXXXX] 21-05-2019 10-54-34 */ /* ----------------------------------- */ #ifndef ASSEMBLY @@ -25,6 +25,7 @@ extern inline unsigned long __metal_driver_fixed_clock_rate(struct metal_clock * /* --------------------- cpu ------------ */ extern inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu); extern inline struct metal_interrupt * __metal_driver_cpu_interrupt_controller(struct metal_cpu *cpu); +extern inline int __metal_driver_cpu_num_pmp_regions(struct metal_cpu *cpu); /* --------------------- sifive_plic0 ------------ */ @@ -173,11 +174,6 @@ struct __metal_driver_riscv_cpu_intc __metal_dt_cpu_0_interrupt_controller = { .init_done = 0, }; -/* From pmp@0 */ -struct metal_pmp __metal_dt_pmp_0 = { - .num_regions = METAL_RISCV_PMP_0_NUM_REGIONS, -}; - /* From interrupt_controller@2000000 */ struct __metal_driver_sifive_clic0 __metal_dt_interrupt_controller_2000000 = { .controller.vtable = &__metal_driver_vtable_sifive_clic0.clic_vtable, diff --git a/bsp/coreip-e24-arty/metal-platform.h b/bsp/coreip-e24-arty/metal-platform.h index 1a3bd88..ec9b9e1 100644 --- a/bsp/coreip-e24-arty/metal-platform.h +++ b/bsp/coreip-e24-arty/metal-platform.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 20-05-2019 14-26-10 */ +/* [XXXXX] 21-05-2019 10-54-34 */ /* ----------------------------------- */ #ifndef COREIP_E24_ARTY__METAL_PLATFORM_H @@ -12,11 +12,6 @@ #define METAL_FIXED_CLOCK -/* From pmp@0 */ -#define METAL_RISCV_PMP_0_NUM_REGIONS 4UL - -#define METAL_RISCV_PMP - /* From interrupt_controller@2000000 */ #define METAL_SIFIVE_CLIC0_2000000_BASE_ADDRESS 33554432UL #define METAL_SIFIVE_CLIC0_0_BASE_ADDRESS 33554432UL diff --git a/bsp/coreip-e24-arty/metal.default.lds b/bsp/coreip-e24-arty/metal.default.lds index 0b7a37a..b7665dd 100644 --- a/bsp/coreip-e24-arty/metal.default.lds +++ b/bsp/coreip-e24-arty/metal.default.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 20-05-2019 14-26-10 */ +/* [XXXXX] 21-05-2019 10-54-34 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") diff --git a/bsp/coreip-e24-arty/metal.h b/bsp/coreip-e24-arty/metal.h index 772ac57..2725154 100644 --- a/bsp/coreip-e24-arty/metal.h +++ b/bsp/coreip-e24-arty/metal.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 20-05-2019 14-26-10 */ +/* [XXXXX] 21-05-2019 10-54-34 */ /* ----------------------------------- */ #ifndef ASSEMBLY @@ -96,7 +96,7 @@ struct __metal_driver_cpu __metal_dt_cpu_0; struct __metal_driver_riscv_cpu_intc __metal_dt_cpu_0_interrupt_controller; -struct metal_pmp __metal_dt_pmp_0; +struct metal_pmp __metal_dt_pmp; /* From interrupt_controller@2000000 */ struct __metal_driver_sifive_clic0 __metal_dt_interrupt_controller_2000000; @@ -194,6 +194,16 @@ static inline struct metal_interrupt * __metal_driver_cpu_interrupt_controller(s } } +static inline int __metal_driver_cpu_num_pmp_regions(struct metal_cpu *cpu) +{ + if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { + return 4; + } + else { + return 0; + } +} + /* --------------------- sifive_plic0 ------------ */ @@ -1226,8 +1236,7 @@ asm (".weak __metal_cpu_table"); struct __metal_driver_cpu *__metal_cpu_table[] = { &__metal_dt_cpu_0}; -/* From pmp@0 */ -#define __METAL_DT_PMP_HANDLE (&__metal_dt_pmp_0) +#define __METAL_DT_PMP_HANDLE (&__metal_dt_pmp) /* From interrupt_controller@2000000 */ #define __METAL_DT_SIFIVE_CLIC0_HANDLE (&__metal_dt_interrupt_controller_2000000.controller) diff --git a/bsp/coreip-e24-arty/metal.ramrodata.lds b/bsp/coreip-e24-arty/metal.ramrodata.lds index e1e793f..54b0c8e 100644 --- a/bsp/coreip-e24-arty/metal.ramrodata.lds +++ b/bsp/coreip-e24-arty/metal.ramrodata.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 20-05-2019 14-26-10 */ +/* [XXXXX] 21-05-2019 10-54-34 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") diff --git a/bsp/coreip-e24-arty/metal.scratchpad.lds b/bsp/coreip-e24-arty/metal.scratchpad.lds index e986066..912117d 100644 --- a/bsp/coreip-e24-arty/metal.scratchpad.lds +++ b/bsp/coreip-e24-arty/metal.scratchpad.lds @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 20-05-2019 14-26-10 */ +/* [XXXXX] 21-05-2019 10-54-34 */ /* ----------------------------------- */ OUTPUT_ARCH("riscv") diff --git a/bsp/coreip-e24-arty/settings.mk b/bsp/coreip-e24-arty/settings.mk index 115db75..429208f 100644 --- a/bsp/coreip-e24-arty/settings.mk +++ b/bsp/coreip-e24-arty/settings.mk @@ -1,7 +1,7 @@ # Copyright 2019 SiFive, Inc # # SPDX-License-Identifier: Apache-2.0 # # ----------------------------------- # -# [XXXXX] 20-05-2019 14-26-10 # +# [XXXXX] 21-05-2019 10-54-34 # # ----------------------------------- # RISCV_ARCH=rv32imafc |