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| author | Nathaniel Graff <nathaniel.graff@sifive.com> | 2019-01-03 21:21:06 +0000 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2019-01-03 21:21:06 +0000 |
| commit | 093255eb95393d945d4e321d1dfa614669f8834b (patch) | |
| tree | 5571f5a07467fc49ed9e5a250352e8b446d94904 /bsp/coreip-e31-arty | |
| parent | f0e161107c5d8e3c2cfef040f7a6feffad3f9c5d (diff) | |
| parent | 6c499b707ad3864aa7f66805d6c9093813a80d3d (diff) | |
Merge pull request #128 from sifive/fix-arty-clocks
Add fixed-clocks to e31 and s51 Arty targets
Diffstat (limited to 'bsp/coreip-e31-arty')
| -rw-r--r-- | bsp/coreip-e31-arty/design.dts | 6 | ||||
| -rw-r--r-- | bsp/coreip-e31-arty/mee.h | 15 |
2 files changed, 20 insertions, 1 deletions
diff --git a/bsp/coreip-e31-arty/design.dts b/bsp/coreip-e31-arty/design.dts index 2e9eaff..fcefbb7 100644 --- a/bsp/coreip-e31-arty/design.dts +++ b/bsp/coreip-e31-arty/design.dts @@ -40,6 +40,11 @@ #size-cells = <1>; compatible = "SiFive,FE310G-soc", "fe310-soc", "sifive-soc", "simple-bus"; ranges; + hfclk: clock@0 { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <32500000>; + }; L1: clint@2000000 { compatible = "riscv,clint0"; interrupts-extended = <&L3 3 &L3 7>; @@ -105,6 +110,7 @@ interrupts = <5>; reg = <0x20000000 0x1000>; reg-names = "control"; + clocks = <&hfclk>; }; L12: spi@20004000 { compatible = "sifive,spi0"; diff --git a/bsp/coreip-e31-arty/mee.h b/bsp/coreip-e31-arty/mee.h index fe68d1f..9f89a75 100644 --- a/bsp/coreip-e31-arty/mee.h +++ b/bsp/coreip-e31-arty/mee.h @@ -1,7 +1,12 @@ #ifndef ASSEMBLY +#include <mee/drivers/fixed-clock.h> #include <mee/drivers/sifive,gpio0.h> #include <mee/drivers/sifive,uart0.h> #include <mee/drivers/sifive,test0.h> +/* From clock@0 */ +asm (".weak __mee_dt_clock_0"); +struct __mee_driver_fixed_clock __mee_dt_clock_0; + /* From gpio@20002000 */ asm (".weak __mee_dt_gpio_20002000"); struct __mee_driver_sifive_gpio0 __mee_dt_gpio_20002000; @@ -14,6 +19,13 @@ struct __mee_driver_sifive_uart0 __mee_dt_serial_20000000; asm (".weak __mee_dt_teststatus_4000"); struct __mee_driver_sifive_test0 __mee_dt_teststatus_4000; +/* From clock@0 */ +struct __mee_driver_fixed_clock __mee_dt_clock_0 = { + .vtable = &__mee_driver_vtable_fixed_clock, + .clock.vtable = &__mee_driver_vtable_fixed_clock.clock, + .rate = 32500000UL, +}; + /* From gpio@20002000 */ struct __mee_driver_sifive_gpio0 __mee_dt_gpio_20002000 = { .vtable = &__mee_driver_vtable_sifive_gpio0, @@ -27,7 +39,8 @@ struct __mee_driver_sifive_uart0 __mee_dt_serial_20000000 = { .uart.vtable = &__mee_driver_vtable_sifive_uart0.uart, .control_base = 536870912UL, .control_size = 4096UL, - .clock = NULL, +/* From clock@0 */ + .clock = &__mee_dt_clock_0.clock, .pinmux = NULL, }; |