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authorBunnaroath Sou <35707615+bsousi5@users.noreply.github.com>2019-02-11 17:20:27 -0800
committerGitHub <noreply@github.com>2019-02-11 17:20:27 -0800
commitf645822003024a89dcf5278dbd386250179bf1f1 (patch)
treea0ac1ea6bf16c93a9f31b5ab825ae8f2e65f24cc /bsp/coreip-e31
parent30837cf2279ec60989898a0d8ef5a1934bd443c0 (diff)
parent5016845c243e08c21e21c623c33c744da5689f6f (diff)
Merge pull request #170 from sifive/hw-breakpoint
Add hw-exec-breakpoint support in dts
Diffstat (limited to 'bsp/coreip-e31')
-rw-r--r--bsp/coreip-e31/design.dts1
1 files changed, 1 insertions, 0 deletions
diff --git a/bsp/coreip-e31/design.dts b/bsp/coreip-e31/design.dts
index f7e9868..c589362 100644
--- a/bsp/coreip-e31/design.dts
+++ b/bsp/coreip-e31/design.dts
@@ -21,6 +21,7 @@
sifive,itim = <&L4>;
status = "okay";
timebase-frequency = <1000000>;
+ hardware-exec-breakpoint-count = <4>;
L3: interrupt-controller {
#interrupt-cells = <1>;
compatible = "riscv,cpu-intc";