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authorNathaniel Graff <nathaniel.graff@sifive.com>2019-05-28 17:10:05 +0000
committerGitHub <noreply@github.com>2019-05-28 17:10:05 +0000
commit4aa97062fb30b239e97ba6b50f35cf8e8d251469 (patch)
treeb38ce688ab045a41bbdcdc90462fb4e4646a0b5d /bsp/coreip-e34-arty
parent869ef0c1a2282f52500c4004224c9c9b196626b9 (diff)
parent12485f45ebb7f96dc60951bf4365533652ac5139 (diff)
Merge pull request #258 from sifive/remove-commas
Remove commas from Freedom Metal filenames
Diffstat (limited to 'bsp/coreip-e34-arty')
-rw-r--r--bsp/coreip-e34-arty/metal-inline.h2
-rw-r--r--bsp/coreip-e34-arty/metal-platform.h2
-rw-r--r--bsp/coreip-e34-arty/metal.default.lds3
-rw-r--r--bsp/coreip-e34-arty/metal.h26
-rw-r--r--bsp/coreip-e34-arty/metal.ramrodata.lds3
-rw-r--r--bsp/coreip-e34-arty/metal.scratchpad.lds3
-rw-r--r--bsp/coreip-e34-arty/settings.mk4
7 files changed, 24 insertions, 19 deletions
diff --git a/bsp/coreip-e34-arty/metal-inline.h b/bsp/coreip-e34-arty/metal-inline.h
index c322ecb..651a9d5 100644
--- a/bsp/coreip-e34-arty/metal-inline.h
+++ b/bsp/coreip-e34-arty/metal-inline.h
@@ -1,7 +1,7 @@
/* Copyright 2019 SiFive, Inc */
/* SPDX-License-Identifier: Apache-2.0 */
/* ----------------------------------- */
-/* [XXXXX] 23-05-2019 13-29-49 */
+/* [XXXXX] 28-05-2019 10-06-00 */
/* ----------------------------------- */
#ifndef ASSEMBLY
diff --git a/bsp/coreip-e34-arty/metal-platform.h b/bsp/coreip-e34-arty/metal-platform.h
index e3781a9..72b0606 100644
--- a/bsp/coreip-e34-arty/metal-platform.h
+++ b/bsp/coreip-e34-arty/metal-platform.h
@@ -1,7 +1,7 @@
/* Copyright 2019 SiFive, Inc */
/* SPDX-License-Identifier: Apache-2.0 */
/* ----------------------------------- */
-/* [XXXXX] 23-05-2019 13-29-49 */
+/* [XXXXX] 28-05-2019 10-06-00 */
/* ----------------------------------- */
#ifndef COREIP_E34_ARTY__METAL_PLATFORM_H
diff --git a/bsp/coreip-e34-arty/metal.default.lds b/bsp/coreip-e34-arty/metal.default.lds
index 4a9e1be..54c5873 100644
--- a/bsp/coreip-e34-arty/metal.default.lds
+++ b/bsp/coreip-e34-arty/metal.default.lds
@@ -1,7 +1,7 @@
/* Copyright 2019 SiFive, Inc */
/* SPDX-License-Identifier: Apache-2.0 */
/* ----------------------------------- */
-/* [XXXXX] 23-05-2019 13-29-49 */
+/* [XXXXX] 28-05-2019 10-06-00 */
/* ----------------------------------- */
OUTPUT_ARCH("riscv")
@@ -30,6 +30,7 @@ SECTIONS
PROVIDE(__stack_size = __stack_size);
__heap_size = DEFINED(__heap_size) ? __heap_size : 0x400;
PROVIDE(__metal_boot_hart = 0);
+ PROVIDE(__metal_chicken_bit = 0);
.init :
diff --git a/bsp/coreip-e34-arty/metal.h b/bsp/coreip-e34-arty/metal.h
index 384bd19..4ada6cf 100644
--- a/bsp/coreip-e34-arty/metal.h
+++ b/bsp/coreip-e34-arty/metal.h
@@ -1,7 +1,7 @@
/* Copyright 2019 SiFive, Inc */
/* SPDX-License-Identifier: Apache-2.0 */
/* ----------------------------------- */
-/* [XXXXX] 23-05-2019 13-29-49 */
+/* [XXXXX] 28-05-2019 10-06-00 */
/* ----------------------------------- */
#ifndef ASSEMBLY
@@ -75,19 +75,19 @@
#include <metal/drivers/fixed-clock.h>
#include <metal/memory.h>
-#include <metal/drivers/riscv,clint0.h>
-#include <metal/drivers/riscv,cpu.h>
-#include <metal/drivers/riscv,plic0.h>
+#include <metal/drivers/riscv_clint0.h>
+#include <metal/drivers/riscv_cpu.h>
+#include <metal/drivers/riscv_plic0.h>
#include <metal/pmp.h>
-#include <metal/drivers/sifive,local-external-interrupts0.h>
-#include <metal/drivers/sifive,global-external-interrupts0.h>
-#include <metal/drivers/sifive,gpio0.h>
-#include <metal/drivers/sifive,gpio-buttons.h>
-#include <metal/drivers/sifive,gpio-leds.h>
-#include <metal/drivers/sifive,gpio-switches.h>
-#include <metal/drivers/sifive,spi0.h>
-#include <metal/drivers/sifive,test0.h>
-#include <metal/drivers/sifive,uart0.h>
+#include <metal/drivers/sifive_local-external-interrupts0.h>
+#include <metal/drivers/sifive_global-external-interrupts0.h>
+#include <metal/drivers/sifive_gpio0.h>
+#include <metal/drivers/sifive_gpio-buttons.h>
+#include <metal/drivers/sifive_gpio-leds.h>
+#include <metal/drivers/sifive_gpio-switches.h>
+#include <metal/drivers/sifive_spi0.h>
+#include <metal/drivers/sifive_test0.h>
+#include <metal/drivers/sifive_uart0.h>
/* From clock@0 */
struct __metal_driver_fixed_clock __metal_dt_clock_0;
diff --git a/bsp/coreip-e34-arty/metal.ramrodata.lds b/bsp/coreip-e34-arty/metal.ramrodata.lds
index a280082..d6fa98e 100644
--- a/bsp/coreip-e34-arty/metal.ramrodata.lds
+++ b/bsp/coreip-e34-arty/metal.ramrodata.lds
@@ -1,7 +1,7 @@
/* Copyright 2019 SiFive, Inc */
/* SPDX-License-Identifier: Apache-2.0 */
/* ----------------------------------- */
-/* [XXXXX] 23-05-2019 13-29-49 */
+/* [XXXXX] 28-05-2019 10-06-00 */
/* ----------------------------------- */
OUTPUT_ARCH("riscv")
@@ -30,6 +30,7 @@ SECTIONS
PROVIDE(__stack_size = __stack_size);
__heap_size = DEFINED(__heap_size) ? __heap_size : 0x400;
PROVIDE(__metal_boot_hart = 0);
+ PROVIDE(__metal_chicken_bit = 0);
.init :
diff --git a/bsp/coreip-e34-arty/metal.scratchpad.lds b/bsp/coreip-e34-arty/metal.scratchpad.lds
index 16211dc..e1909e6 100644
--- a/bsp/coreip-e34-arty/metal.scratchpad.lds
+++ b/bsp/coreip-e34-arty/metal.scratchpad.lds
@@ -1,7 +1,7 @@
/* Copyright 2019 SiFive, Inc */
/* SPDX-License-Identifier: Apache-2.0 */
/* ----------------------------------- */
-/* [XXXXX] 23-05-2019 13-29-49 */
+/* [XXXXX] 28-05-2019 10-06-00 */
/* ----------------------------------- */
OUTPUT_ARCH("riscv")
@@ -30,6 +30,7 @@ SECTIONS
PROVIDE(__stack_size = __stack_size);
__heap_size = DEFINED(__heap_size) ? __heap_size : 0x400;
PROVIDE(__metal_boot_hart = 0);
+ PROVIDE(__metal_chicken_bit = 0);
.init :
diff --git a/bsp/coreip-e34-arty/settings.mk b/bsp/coreip-e34-arty/settings.mk
index 1e501a6..c4fc996 100644
--- a/bsp/coreip-e34-arty/settings.mk
+++ b/bsp/coreip-e34-arty/settings.mk
@@ -1,12 +1,14 @@
# Copyright 2019 SiFive, Inc #
# SPDX-License-Identifier: Apache-2.0 #
# ----------------------------------- #
-# [XXXXX] 23-05-2019 13-29-49 #
+# [XXXXX] 28-05-2019 10-06-00 #
# ----------------------------------- #
RISCV_ARCH=rv32imafc
RISCV_ABI=ilp32f
RISCV_CMODEL=medlow
+RISCV_SERIES=sifive-3-series
TARGET_TAGS=fpga openocd
TARGET_DHRY_ITERS=20000000
+TARGET_CORE_ITERS=5000