Merge pull request #235 from sifive/u54-rtl

Add Multicore Support

4 files changed, 61 insertions, 21 deletions

diff --git a/bsp/coreip-e76-arty/metal.default.lds b/bsp/coreip-e76-arty/metal.default.lds
index c4cae6b..ccd5fb0 100644
--- a/bsp/coreip-e76-arty/metal.default.lds
+++ b/bsp/coreip-e76-arty/metal.default.lds
@@ -20,6 +20,7 @@ PHDRS
 SECTIONS
 {
 	__stack_size = DEFINED(__stack_size) ? __stack_size : 0x400;
+	PROVIDE(__stack_size = __stack_size);
 	__heap_size = DEFINED(__heap_size) ? __heap_size : 0x400;
 
 
@@ -217,7 +218,6 @@ SECTIONS
 	{
 		PROVIDE( metal_segment_heap_target_start = . );
 		. = __heap_size;
-		. = __heap_size == 0 ? 0 : ORIGIN(ram) + LENGTH(ram);
 		PROVIDE( metal_segment_heap_target_end = . );
 		PROVIDE( _heap_end = . );
 	} >ram AT>ram :ram
diff --git a/bsp/coreip-e76-arty/metal.h b/bsp/coreip-e76-arty/metal.h
index 35ad054..b384007 100644
--- a/bsp/coreip-e76-arty/metal.h
+++ b/bsp/coreip-e76-arty/metal.h
@@ -5,11 +5,21 @@
 
 #ifdef __METAL_MACHINE_MACROS
 
+#define __METAL_CLINT_NUM_PARENTS 2
+
+#ifndef __METAL_CLINT_NUM_PARENTS
+#define __METAL_CLINT_NUM_PARENTS 0
+#endif
 #define __METAL_PLIC_SUBINTERRUPTS 31
 
+#define __METAL_PLIC_NUM_PARENTS 1
+
 #ifndef __METAL_PLIC_SUBINTERRUPTS
 #define __METAL_PLIC_SUBINTERRUPTS 0
 #endif
+#ifndef __METAL_PLIC_NUM_PARENTS
+#define __METAL_PLIC_NUM_PARENTS 0
+#endif
 #ifndef __METAL_CLIC_SUBINTERRUPTS
 #define __METAL_CLIC_SUBINTERRUPTS 0
 #endif
@@ -20,12 +30,16 @@
 
 #define METAL_MAX_CLINT_INTERRUPTS 2
 
+#define __METAL_CLINT_NUM_PARENTS 2
+
 #define __METAL_INTERRUPT_CONTROLLER_C000000_INTERRUPTS 1
 
 #define __METAL_PLIC_SUBINTERRUPTS 31
 
 #define METAL_MAX_PLIC_INTERRUPTS 1
 
+#define __METAL_PLIC_NUM_PARENTS 1
+
 #define __METAL_CLIC_SUBINTERRUPTS 0
 #define METAL_MAX_CLIC_INTERRUPTS 0
 
@@ -47,6 +61,7 @@
 
 
 #include <metal/drivers/fixed-clock.h>
+#include <metal/memory.h>
 #include <metal/drivers/riscv,clint0.h>
 #include <metal/drivers/riscv,cpu.h>
 #include <metal/drivers/riscv,plic0.h>
@@ -64,6 +79,12 @@
 asm (".weak __metal_dt_tlclk");
 struct __metal_driver_fixed_clock __metal_dt_tlclk;
 
+asm (".weak __metal_dt_mem_memory_80000000");
+struct metal_memory __metal_dt_mem_memory_80000000;
+
+asm (".weak __metal_dt_mem_spi_20004000");
+struct metal_memory __metal_dt_mem_spi_20004000;
+
 /* From clint@2000000 */
 asm (".weak __metal_dt_clint_2000000");
 struct __metal_driver_riscv_clint0 __metal_dt_clint_2000000;
@@ -72,9 +93,8 @@ struct __metal_driver_riscv_clint0 __metal_dt_clint_2000000;
 asm (".weak __metal_dt_cpu_0");
 struct __metal_driver_cpu __metal_dt_cpu_0;
 
-/* From interrupt_controller */
-asm (".weak __metal_dt_interrupt_controller");
-struct __metal_driver_riscv_cpu_intc __metal_dt_interrupt_controller;
+asm (".weak __metal_dt_cpu_0_interrupt_controller");
+struct __metal_driver_riscv_cpu_intc __metal_dt_cpu_0_interrupt_controller;
 
 /* From interrupt_controller@c000000 */
 asm (".weak __metal_dt_interrupt_controller_c000000");
@@ -159,6 +179,28 @@ struct __metal_driver_fixed_clock __metal_dt_tlclk = {
     .rate = 32500000UL,
 };
 
+struct metal_memory __metal_dt_mem_memory_80000000 = {
+    ._base_address = 2147483648UL,
+    ._size = 268435456UL,
+    ._attrs = {
+        .R = 1,
+        .W = 1,
+        .X = 1,
+        .C = 1,
+        .A = 1},
+};
+
+struct metal_memory __metal_dt_mem_spi_20004000 = {
+    ._base_address = 1073741824UL,
+    ._size = 536870912UL,
+    ._attrs = {
+        .R = 1,
+        .W = 1,
+        .X = 1,
+        .C = 1,
+        .A = 1},
+};
+
 /* From clint@2000000 */
 struct __metal_driver_riscv_clint0 __metal_dt_clint_2000000 = {
     .vtable = &__metal_driver_vtable_riscv_clint0,
@@ -167,8 +209,9 @@ struct __metal_driver_riscv_clint0 __metal_dt_clint_2000000 = {
     .control_size = 65536UL,
     .init_done = 0,
     .num_interrupts = METAL_MAX_CLINT_INTERRUPTS,
-    .interrupt_parent = &__metal_dt_interrupt_controller.controller,
+    .interrupt_parents[0] = &__metal_dt_cpu_0_interrupt_controller.controller,
     .interrupt_lines[0] = 3,
+    .interrupt_parents[1] = &__metal_dt_cpu_0_interrupt_controller.controller,
     .interrupt_lines[1] = 7,
 };
 
@@ -177,11 +220,11 @@ struct __metal_driver_cpu __metal_dt_cpu_0 = {
     .vtable = &__metal_driver_vtable_cpu,
     .cpu.vtable = &__metal_driver_vtable_cpu.cpu_vtable,
     .timebase = 65000000UL,
-    .interrupt_controller = &__metal_dt_interrupt_controller.controller,
+    .interrupt_controller = &__metal_dt_cpu_0_interrupt_controller.controller,
 };
 
 /* From interrupt_controller */
-struct __metal_driver_riscv_cpu_intc __metal_dt_interrupt_controller = {
+struct __metal_driver_riscv_cpu_intc __metal_dt_cpu_0_interrupt_controller = {
     .vtable = &__metal_driver_vtable_riscv_cpu_intc,
     .controller.vtable = &__metal_driver_vtable_riscv_cpu_intc.controller_vtable,
     .init_done = 0,
@@ -193,9 +236,8 @@ struct __metal_driver_riscv_plic0 __metal_dt_interrupt_controller_c000000 = {
     .vtable = &__metal_driver_vtable_riscv_plic0,
     .controller.vtable = &__metal_driver_vtable_riscv_plic0.plic_vtable,
     .init_done = 0,
-/* From interrupt_controller */
-    .interrupt_parent = &__metal_dt_interrupt_controller.controller,
-    .interrupt_line = 11UL,
+    .interrupt_parents[0] = &__metal_dt_cpu_0_interrupt_controller.controller,
+    .interrupt_lines[0] = 11,
     .control_base = 201326592UL,
     .control_size = 67108864UL,
     .max_priority = 7UL,
@@ -429,6 +471,13 @@ struct __metal_driver_sifive_uart0 __metal_dt_serial_20000000 = {
 };
 
 
+#define __METAL_DT_MAX_MEMORIES 2
+
+asm (".weak __metal_memory_table");
+struct metal_memory *__metal_memory_table[] = {
+					&__metal_dt_mem_memory_80000000,
+					&__metal_dt_mem_spi_20004000};
+
 /* From serial@20000000 */
 #define __METAL_DT_STDOUT_UART_HANDLE (&__metal_dt_serial_20000000.uart)
 
@@ -441,22 +490,12 @@ struct __metal_driver_sifive_uart0 __metal_dt_serial_20000000 = {
 
 #define __METAL_DT_CLINT_2000000_HANDLE (&__metal_dt_clint_2000000.controller)
 
-/* From cpu@0 */
-#define __METAL_DT_RISCV_CPU_HANDLE (&__metal_dt_cpu_0.cpu)
-
-#define __METAL_DT_CPU_0_HANDLE (&__metal_dt_cpu_0.cpu)
-
 #define __METAL_DT_MAX_HARTS 1
 
 asm (".weak __metal_cpu_table");
 struct __metal_driver_cpu *__metal_cpu_table[] = {
 					&__metal_dt_cpu_0};
 
-/* From interrupt_controller */
-#define __METAL_DT_RISCV_CPU_INTC_HANDLE (&__metal_dt_interrupt_controller.controller)
-
-#define __METAL_DT_INTERRUPT_CONTROLLER_HANDLE (&__metal_dt_interrupt_controller.controller)
-
 /* From interrupt_controller@c000000 */
 #define __METAL_DT_RISCV_PLIC0_HANDLE (&__metal_dt_interrupt_controller_c000000.controller)
 
diff --git a/bsp/coreip-e76-arty/metal.ramrodata.lds b/bsp/coreip-e76-arty/metal.ramrodata.lds
index cb59d74..2c0d61e 100644
--- a/bsp/coreip-e76-arty/metal.ramrodata.lds
+++ b/bsp/coreip-e76-arty/metal.ramrodata.lds
@@ -20,6 +20,7 @@ PHDRS
 SECTIONS
 {
 	__stack_size = DEFINED(__stack_size) ? __stack_size : 0x400;
+	PROVIDE(__stack_size = __stack_size);
 	__heap_size = DEFINED(__heap_size) ? __heap_size : 0x400;
 
 
@@ -214,7 +215,6 @@ SECTIONS
 	{
 		PROVIDE( metal_segment_heap_target_start = . );
 		. = __heap_size;
-		. = __heap_size == 0 ? 0 : ORIGIN(ram) + LENGTH(ram);
 		PROVIDE( metal_segment_heap_target_end = . );
 		PROVIDE( _heap_end = . );
 	} >ram AT>ram :ram
diff --git a/bsp/coreip-e76-arty/metal.scratchpad.lds b/bsp/coreip-e76-arty/metal.scratchpad.lds
index f75dc04..fe384ff 100644
--- a/bsp/coreip-e76-arty/metal.scratchpad.lds
+++ b/bsp/coreip-e76-arty/metal.scratchpad.lds
@@ -20,6 +20,7 @@ PHDRS
 SECTIONS
 {
 	__stack_size = DEFINED(__stack_size) ? __stack_size : 0x400;
+	PROVIDE(__stack_size = __stack_size);
 	__heap_size = DEFINED(__heap_size) ? __heap_size : 0x400;