diff options
| author | Nathaniel Graff <nathaniel.graff@sifive.com> | 2019-04-10 10:52:43 -0700 |
|---|---|---|
| committer | Nathaniel Graff <nathaniel.graff@sifive.com> | 2019-04-11 14:38:48 -0700 |
| commit | db80f993967d9fe27be362df1fa38e6ec3b411d5 (patch) | |
| tree | 9bbc6392c3dd8baf1c0e3b5a47f81a7d405406ad /bsp/coreip-e76-arty | |
| parent | a4b55a67c32b6ab7caefba27e53d9e109ef192b3 (diff) | |
Add missing PMP nodes
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
Diffstat (limited to 'bsp/coreip-e76-arty')
| -rw-r--r-- | bsp/coreip-e76-arty/design.dts | 4 | ||||
| -rw-r--r-- | bsp/coreip-e76-arty/metal.h | 11 |
2 files changed, 15 insertions, 0 deletions
diff --git a/bsp/coreip-e76-arty/design.dts b/bsp/coreip-e76-arty/design.dts index 55edc8b..1ea526f 100644 --- a/bsp/coreip-e76-arty/design.dts +++ b/bsp/coreip-e76-arty/design.dts @@ -47,6 +47,10 @@ #size-cells = <1>; compatible = "SiFive,FE710G-soc", "fe710-soc", "sifive-soc", "simple-bus"; ranges; + pmp: pmp@0 { + compatible = "riscv,pmp"; + regions = <8>; + }; L2: clint@2000000 { compatible = "riscv,clint0"; interrupts-extended = <&L4 3 &L4 7>; diff --git a/bsp/coreip-e76-arty/metal.h b/bsp/coreip-e76-arty/metal.h index 6365e99..35ad054 100644 --- a/bsp/coreip-e76-arty/metal.h +++ b/bsp/coreip-e76-arty/metal.h @@ -80,6 +80,9 @@ struct __metal_driver_riscv_cpu_intc __metal_dt_interrupt_controller; asm (".weak __metal_dt_interrupt_controller_c000000"); struct __metal_driver_riscv_plic0 __metal_dt_interrupt_controller_c000000; +asm (".weak __metal_dt_pmp_0"); +struct metal_pmp __metal_dt_pmp_0; + /* From global_external_interrupts */ asm (".weak __metal_dt_global_external_interrupts"); struct __metal_driver_sifive_global_external_interrupts0 __metal_dt_global_external_interrupts; @@ -200,6 +203,11 @@ struct __metal_driver_riscv_plic0 __metal_dt_interrupt_controller_c000000 = { .interrupt_controller = 1, }; +/* From pmp@0 */ +struct metal_pmp __metal_dt_pmp_0 = { + .num_regions = 8UL, +}; + /* From global_external_interrupts */ struct __metal_driver_sifive_global_external_interrupts0 __metal_dt_global_external_interrupts = { .vtable = &__metal_driver_vtable_sifive_global_external_interrupts0, @@ -454,6 +462,9 @@ struct __metal_driver_cpu *__metal_cpu_table[] = { #define __METAL_DT_INTERRUPT_CONTROLLER_C000000_HANDLE (&__metal_dt_interrupt_controller_c000000.controller) +/* From pmp@0 */ +#define __METAL_DT_PMP_HANDLE (&__metal_dt_pmp_0) + /* From global_external_interrupts */ #define __METAL_DT_SIFIVE_GLOBAL_EXINTR0_HANDLE (&__metal_dt_global_external_interrupts.irc) |