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author | Nathaniel Graff <nathaniel.graff@sifive.com> | 2019-06-21 16:36:57 +0000 |
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committer | GitHub <noreply@github.com> | 2019-06-21 16:36:57 +0000 |
commit | 0f5761d7d32edddf93f302f52b903e8acca08c5e (patch) | |
tree | 46ff4106f51fb6d5f682cf6af73ef1a4ab5f147e /bsp/coreip-e76-rtl/metal-platform.h | |
parent | eecf71d7cf0ec12997dbceffde190b1086595908 (diff) | |
parent | 713237cb963ebf81aca0715d8a770fdbe5d71cb9 (diff) |
Merge pull request #287 from sifive/remove-coreip-bsps
Remove all CoreIP BSPs
Diffstat (limited to 'bsp/coreip-e76-rtl/metal-platform.h')
-rw-r--r-- | bsp/coreip-e76-rtl/metal-platform.h | 50 |
1 files changed, 0 insertions, 50 deletions
diff --git a/bsp/coreip-e76-rtl/metal-platform.h b/bsp/coreip-e76-rtl/metal-platform.h deleted file mode 100644 index 440e8c7..0000000 --- a/bsp/coreip-e76-rtl/metal-platform.h +++ /dev/null @@ -1,50 +0,0 @@ -/* Copyright 2019 SiFive, Inc */ -/* SPDX-License-Identifier: Apache-2.0 */ -/* ----------------------------------- */ -/* ----------------------------------- */ - -#ifndef COREIP_E76_RTL__METAL_PLATFORM_H -#define COREIP_E76_RTL__METAL_PLATFORM_H - -/* From clint@2000000 */ -#define METAL_RISCV_CLINT0_2000000_BASE_ADDRESS 33554432UL -#define METAL_RISCV_CLINT0_0_BASE_ADDRESS 33554432UL -#define METAL_RISCV_CLINT0_2000000_SIZE 65536UL -#define METAL_RISCV_CLINT0_0_SIZE 65536UL - -#define METAL_RISCV_CLINT0 -#define METAL_RISCV_CLINT0_MSIP_BASE 0UL -#define METAL_RISCV_CLINT0_MTIMECMP_BASE 16384UL -#define METAL_RISCV_CLINT0_MTIME 49144UL - -/* From interrupt_controller@c000000 */ -#define METAL_RISCV_PLIC0_C000000_BASE_ADDRESS 201326592UL -#define METAL_RISCV_PLIC0_0_BASE_ADDRESS 201326592UL -#define METAL_RISCV_PLIC0_C000000_SIZE 67108864UL -#define METAL_RISCV_PLIC0_0_SIZE 67108864UL -#define METAL_RISCV_PLIC0_C000000_RISCV_MAX_PRIORITY 7UL -#define METAL_RISCV_PLIC0_0_RISCV_MAX_PRIORITY 7UL -#define METAL_RISCV_PLIC0_C000000_RISCV_NDEV 128UL -#define METAL_RISCV_PLIC0_0_RISCV_NDEV 128UL - -#define METAL_RISCV_PLIC0 -#define METAL_RISCV_PLIC0_PRIORITY_BASE 0UL -#define METAL_RISCV_PLIC0_PENDING_BASE 4096UL -#define METAL_RISCV_PLIC0_ENABLE_BASE 8192UL -#define METAL_RISCV_PLIC0_THRESHOLD 2097152UL -#define METAL_RISCV_PLIC0_CLAIM 2097156UL - -/* From global_external_interrupts */ - -#define METAL_SIFIVE_GLOBAL_EXTERNAL_INTERRUPTS0 - -/* From teststatus@4000 */ -#define METAL_SIFIVE_TEST0_4000_BASE_ADDRESS 16384UL -#define METAL_SIFIVE_TEST0_0_BASE_ADDRESS 16384UL -#define METAL_SIFIVE_TEST0_4000_SIZE 4096UL -#define METAL_SIFIVE_TEST0_0_SIZE 4096UL - -#define METAL_SIFIVE_TEST0 -#define METAL_SIFIVE_TEST0_FINISHER_OFFSET 0UL - -#endif /* COREIP_E76_RTL__METAL_PLATFORM_H*/ |