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authorBunnaroath Sou <bsou@sifive.com>2019-03-18 18:35:55 -0700
committerBunnaroath Sou <bsou@sifive.com>2019-03-18 18:35:55 -0700
commit453ec9a253c7d8b1e1b5ddc6f14d4d14f670f9a3 (patch)
treeb4533403e6354376fefb83ec0f1cc5ab53c883c7 /bsp/coreip-s51-arty/metal.h
parent44c064f651cf4756f44fb96d542a8db2d4a33471 (diff)
Make rtl target to use ram from dtim, flash from testram
Diffstat (limited to 'bsp/coreip-s51-arty/metal.h')
0 files changed, 0 insertions, 0 deletions