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| author | Megan Wachs <megan@sifive.com> | 2017-02-01 18:03:37 -0800 |
|---|---|---|
| committer | Megan Wachs <megan@sifive.com> | 2017-02-01 18:03:37 -0800 |
| commit | b003c52b0f5460c6e0e15cb29171164530490e08 (patch) | |
| tree | a9749852b36fed0e66fa663dcea16972dc75f6c5 /bsp/coreip-s51-arty | |
| parent | 08a72bb956a25fd94d965fb4474f3ddcca1ed1e6 (diff) | |
PRCI: add control for the target CPU frequency (to allow a minimum, maximum, or closest match)
Diffstat (limited to 'bsp/coreip-s51-arty')
0 files changed, 0 insertions, 0 deletions