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author | Bunnaroath Sou <35707615+bsousi5@users.noreply.github.com> | 2019-03-19 18:16:56 -0700 |
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committer | GitHub <noreply@github.com> | 2019-03-19 18:16:56 -0700 |
commit | 318ac16f2b0fdab7ac82758993e7e6835b94115d (patch) | |
tree | bd15b52cccb8ff4f9c6e184db10aa8d4520b7aa0 /bsp/coreip-s51-rtl/metal.scratchpad.lds | |
parent | 0f8c780d82b2ec3eda351229e79953bbde7bb95a (diff) | |
parent | ac5e78c355567d2ed430e22b4c1d119188904d83 (diff) |
Merge pull request #209 from sifive/arty-19.2
Make rtl target to use ram from dtim, flash from testram
Diffstat (limited to 'bsp/coreip-s51-rtl/metal.scratchpad.lds')
-rw-r--r-- | bsp/coreip-s51-rtl/metal.scratchpad.lds | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/bsp/coreip-s51-rtl/metal.scratchpad.lds b/bsp/coreip-s51-rtl/metal.scratchpad.lds index bc7b16a..8ead4a8 100644 --- a/bsp/coreip-s51-rtl/metal.scratchpad.lds +++ b/bsp/coreip-s51-rtl/metal.scratchpad.lds @@ -4,8 +4,9 @@ ENTRY(_enter) MEMORY { + ram (wxa!ri) : ORIGIN = 0x80000000, LENGTH = 0x10000 itim (wx!rai) : ORIGIN = 0x8000000, LENGTH = 0x4000 - ram (wxa!ri) : ORIGIN = 0x20000000, LENGTH = 0x4000000 + flash (rxai!w) : ORIGIN = 0x20000000, LENGTH = 0x4000000 } PHDRS |