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authorBunnaroath Sou <bsou@sifive.com>2019-03-18 12:58:11 -0700
committerBunnaroath Sou <bsou@sifive.com>2019-03-18 12:58:11 -0700
commit0fe5ca97956cc15effd0c459a81c8caacbc80ac3 (patch)
treead49ff7afc82f2ae691b8ebea1f8f88ae806b14c /bsp/coreip-s51-rtl
parent6695a994b01585ae3dce0e492de3c4e3feb2ae4f (diff)
Update Arty clock to reflects HW
Diffstat (limited to 'bsp/coreip-s51-rtl')
-rw-r--r--bsp/coreip-s51-rtl/metal.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/bsp/coreip-s51-rtl/metal.h b/bsp/coreip-s51-rtl/metal.h
index fb8ae89..6618a7c 100644
--- a/bsp/coreip-s51-rtl/metal.h
+++ b/bsp/coreip-s51-rtl/metal.h
@@ -1,7 +1,7 @@
#ifndef ASSEMBLY
-#ifndef COREIP_S51__METAL_H
-#define COREIP_S51__METAL_H
+#ifndef COREIP_S51_RTL__METAL_H
+#define COREIP_S51_RTL__METAL_H
#ifdef __METAL_MACHINE_MACROS
@@ -367,5 +367,5 @@ struct __metal_driver_sifive_spi0 *__metal_spi_table[] = {
#endif /* ! __METAL_MACHINE_MACROS */
-#endif /* COREIP_S51__METAL_H*/
+#endif /* COREIP_S51_RTL__METAL_H*/
#endif /* ! ASSEMBLY */