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authorDrew Barbier <drew@sifive.com>2017-05-05 12:42:58 -0500
committerDrew Barbier <drew@sifive.com>2017-05-05 12:42:58 -0500
commit0e8ad666d4d103ff1ee01118370ba837b8ad2fd4 (patch)
tree691eaff881f391194aa9942f665e4b1538289e78 /bsp/coreip-s54-arty/settings.mk
parent192b5e6b0346610d024c1f473e2ef18fafb2f7ce (diff)
Adding E31FPGA projects
Diffstat (limited to 'bsp/coreip-s54-arty/settings.mk')
0 files changed, 0 insertions, 0 deletions