diff options
author | Bunnaroath Sou <bsou@sifive.com> | 2019-03-18 18:35:55 -0700 |
---|---|---|
committer | Bunnaroath Sou <bsou@sifive.com> | 2019-03-18 18:35:55 -0700 |
commit | 453ec9a253c7d8b1e1b5ddc6f14d4d14f670f9a3 (patch) | |
tree | b4533403e6354376fefb83ec0f1cc5ab53c883c7 /bsp/coreip-s54-rtl | |
parent | 44c064f651cf4756f44fb96d542a8db2d4a33471 (diff) |
Make rtl target to use ram from dtim, flash from testram
Diffstat (limited to 'bsp/coreip-s54-rtl')
-rw-r--r-- | bsp/coreip-s54-rtl/metal.default.lds | 38 | ||||
-rw-r--r-- | bsp/coreip-s54-rtl/metal.ramrodata.lds | 36 | ||||
-rw-r--r-- | bsp/coreip-s54-rtl/metal.scratchpad.lds | 3 |
3 files changed, 41 insertions, 36 deletions
diff --git a/bsp/coreip-s54-rtl/metal.default.lds b/bsp/coreip-s54-rtl/metal.default.lds index bc7b16a..efa595f 100644 --- a/bsp/coreip-s54-rtl/metal.default.lds +++ b/bsp/coreip-s54-rtl/metal.default.lds @@ -4,8 +4,9 @@ ENTRY(_enter) MEMORY { + ram (wxa!ri) : ORIGIN = 0x80000000, LENGTH = 0x10000 itim (wx!rai) : ORIGIN = 0x8000000, LENGTH = 0x4000 - ram (wxa!ri) : ORIGIN = 0x20000000, LENGTH = 0x4000000 + flash (rxai!w) : ORIGIN = 0x20000000, LENGTH = 0x4000000 } PHDRS @@ -13,8 +14,8 @@ PHDRS flash PT_LOAD; ram_init PT_LOAD; itim_init PT_LOAD; - ram PT_LOAD; - itim PT_LOAD; + ram PT_NULL; + itim PT_NULL; } SECTIONS @@ -28,7 +29,7 @@ SECTIONS KEEP (*(.text.metal.init.enter)) KEEP (*(SORT_NONE(.init))) KEEP (*(.text.libgloss.start)) - } >ram AT>ram :ram + } >flash AT>flash :flash .text : @@ -38,13 +39,13 @@ SECTIONS *(.text .text.*) *(.itim .itim.*) *(.gnu.linkonce.t.*) - } >ram AT>ram :ram + } >flash AT>flash :flash .fini : { KEEP (*(SORT_NONE(.fini))) - } >ram AT>ram :ram + } >flash AT>flash :flash PROVIDE (__etext = .); @@ -57,7 +58,7 @@ SECTIONS *(.rdata) *(.rodata .rodata.*) *(.gnu.linkonce.r.*) - } >ram AT>ram :ram + } >flash AT>flash :flash . = ALIGN(4); @@ -68,7 +69,7 @@ SECTIONS PROVIDE_HIDDEN (__preinit_array_start = .); KEEP (*(.preinit_array)) PROVIDE_HIDDEN (__preinit_array_end = .); - } >ram AT>ram :ram + } >flash AT>flash :flash .init_array : @@ -77,7 +78,7 @@ SECTIONS KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*))) KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors)) PROVIDE_HIDDEN (__init_array_end = .); - } >ram AT>ram :ram + } >flash AT>flash :flash .finit_array : @@ -86,7 +87,7 @@ SECTIONS KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*))) KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors)) PROVIDE_HIDDEN (__finit_array_end = .); - } >ram AT>ram :ram + } >flash AT>flash :flash .ctors : @@ -109,7 +110,7 @@ SECTIONS KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors)) KEEP (*(SORT(.ctors.*))) KEEP (*(.ctors)) - } >ram AT>ram :ram + } >flash AT>flash :flash .dtors : @@ -119,27 +120,27 @@ SECTIONS KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors)) KEEP (*(SORT(.dtors.*))) KEEP (*(.dtors)) - } >ram AT>ram :ram + } >flash AT>flash :flash .litimalign : { . = ALIGN(4); PROVIDE( metal_segment_itim_source_start = . ); - } >ram AT>ram :ram + } >flash AT>flash :flash .ditimalign : { . = ALIGN(4); PROVIDE( metal_segment_itim_target_start = . ); - } >itim AT>ram :itim_init + } >itim AT>flash :itim_init .itim : { *(.itim .itim.*) - } >itim AT>ram :itim_init + } >itim AT>flash :itim_init . = ALIGN(8); @@ -151,14 +152,14 @@ SECTIONS . = ALIGN(4); PROVIDE( _data_lma = . ); PROVIDE( metal_segment_data_source_start = . ); - } >ram AT>ram :ram + } >flash AT>flash :flash .dalign : { . = ALIGN(4); PROVIDE( metal_segment_data_target_start = . ); - } >ram AT>ram :ram_init + } >ram AT>flash :ram_init .data : @@ -175,7 +176,7 @@ SECTIONS *(.srodata.cst4) *(.srodata.cst2) *(.srodata .srodata.*) - } >ram AT>ram :ram_init + } >ram AT>flash :ram_init . = ALIGN(4); @@ -217,6 +218,7 @@ SECTIONS { PROVIDE( metal_segment_heap_target_start = . ); . = __heap_size; + . = __heap_size == 0 ? 0 : ORIGIN(ram) + LENGTH(ram); PROVIDE( metal_segment_heap_target_end = . ); PROVIDE( _heap_end = . ); } >ram AT>ram :ram diff --git a/bsp/coreip-s54-rtl/metal.ramrodata.lds b/bsp/coreip-s54-rtl/metal.ramrodata.lds index 5afbc7b..de23402 100644 --- a/bsp/coreip-s54-rtl/metal.ramrodata.lds +++ b/bsp/coreip-s54-rtl/metal.ramrodata.lds @@ -4,8 +4,9 @@ ENTRY(_enter) MEMORY { + ram (wxa!ri) : ORIGIN = 0x80000000, LENGTH = 0x10000 itim (wx!rai) : ORIGIN = 0x8000000, LENGTH = 0x4000 - ram (wxa!ri) : ORIGIN = 0x20000000, LENGTH = 0x4000000 + flash (rxai!w) : ORIGIN = 0x20000000, LENGTH = 0x4000000 } PHDRS @@ -13,8 +14,8 @@ PHDRS flash PT_LOAD; ram_init PT_LOAD; itim_init PT_LOAD; - ram PT_LOAD; - itim PT_LOAD; + ram PT_NULL; + itim PT_NULL; } SECTIONS @@ -28,7 +29,7 @@ SECTIONS KEEP (*(.text.metal.init.enter)) KEEP (*(SORT_NONE(.init))) KEEP (*(.text.libgloss.start)) - } >ram AT>ram :ram + } >flash AT>flash :flash @@ -36,7 +37,7 @@ SECTIONS .fini : { KEEP (*(SORT_NONE(.fini))) - } >ram AT>ram :ram + } >flash AT>flash :flash PROVIDE (__etext = .); @@ -54,7 +55,7 @@ SECTIONS PROVIDE_HIDDEN (__preinit_array_start = .); KEEP (*(.preinit_array)) PROVIDE_HIDDEN (__preinit_array_end = .); - } >ram AT>ram :ram + } >flash AT>flash :flash .init_array : @@ -63,7 +64,7 @@ SECTIONS KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*))) KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors)) PROVIDE_HIDDEN (__init_array_end = .); - } >ram AT>ram :ram + } >flash AT>flash :flash .finit_array : @@ -72,7 +73,7 @@ SECTIONS KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*))) KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors)) PROVIDE_HIDDEN (__finit_array_end = .); - } >ram AT>ram :ram + } >flash AT>flash :flash .ctors : @@ -95,7 +96,7 @@ SECTIONS KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors)) KEEP (*(SORT(.ctors.*))) KEEP (*(.ctors)) - } >ram AT>ram :ram + } >flash AT>flash :flash .dtors : @@ -105,27 +106,27 @@ SECTIONS KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors)) KEEP (*(SORT(.dtors.*))) KEEP (*(.dtors)) - } >ram AT>ram :ram + } >flash AT>flash :flash .litimalign : { . = ALIGN(4); PROVIDE( metal_segment_itim_source_start = . ); - } >ram AT>ram :ram + } >flash AT>flash :flash .ditimalign : { . = ALIGN(4); PROVIDE( metal_segment_itim_target_start = . ); - } >itim AT>ram :itim_init + } >itim AT>flash :itim_init .itim : { *(.itim .itim.*) - } >itim AT>ram :itim_init + } >itim AT>flash :itim_init . = ALIGN(8); @@ -137,7 +138,7 @@ SECTIONS *(.text .text.*) *(.gnu.linkonce.t.*) *(.itim .itim.*) - } >ram AT>ram :ram + } >flash AT>flash :flash .lalign : @@ -145,14 +146,14 @@ SECTIONS . = ALIGN(4); PROVIDE( _data_lma = . ); PROVIDE( metal_segment_data_source_start = . ); - } >ram AT>ram :ram + } >flash AT>flash :flash .dalign : { . = ALIGN(4); PROVIDE( metal_segment_data_target_start = . ); - } >ram AT>ram :ram_init + } >ram AT>flash :ram_init .data : @@ -172,7 +173,7 @@ SECTIONS *(.srodata.cst4) *(.srodata.cst2) *(.srodata .srodata.*) - } >ram AT>ram :ram_init + } >ram AT>flash :ram_init . = ALIGN(4); @@ -214,6 +215,7 @@ SECTIONS { PROVIDE( metal_segment_heap_target_start = . ); . = __heap_size; + . = __heap_size == 0 ? 0 : ORIGIN(ram) + LENGTH(ram); PROVIDE( metal_segment_heap_target_end = . ); PROVIDE( _heap_end = . ); } >ram AT>ram :ram diff --git a/bsp/coreip-s54-rtl/metal.scratchpad.lds b/bsp/coreip-s54-rtl/metal.scratchpad.lds index bc7b16a..8ead4a8 100644 --- a/bsp/coreip-s54-rtl/metal.scratchpad.lds +++ b/bsp/coreip-s54-rtl/metal.scratchpad.lds @@ -4,8 +4,9 @@ ENTRY(_enter) MEMORY { + ram (wxa!ri) : ORIGIN = 0x80000000, LENGTH = 0x10000 itim (wx!rai) : ORIGIN = 0x8000000, LENGTH = 0x4000 - ram (wxa!ri) : ORIGIN = 0x20000000, LENGTH = 0x4000000 + flash (rxai!w) : ORIGIN = 0x20000000, LENGTH = 0x4000000 } PHDRS |