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| author | Nathaniel Graff <nathaniel.graff@sifive.com> | 2019-05-22 17:53:09 +0000 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2019-05-22 17:53:09 +0000 |
| commit | 44deff8b8d615721c11ab5f408da73030b01d0f9 (patch) | |
| tree | 34cd2bb52009a596dc8de95bf2b7262f5a6ce3f9 /bsp/coreip-u54mc-rtl/metal.h | |
| parent | 9946f2062837098088e4c9701614a2eeffaa921b (diff) | |
| parent | c5dd42c68d030a356c85bb8d174296b4f2df615d (diff) | |
Merge pull request #254 from sifive/dts-pmpregions
Update to new-style riscv,pmpregions property
Diffstat (limited to 'bsp/coreip-u54mc-rtl/metal.h')
| -rw-r--r-- | bsp/coreip-u54mc-rtl/metal.h | 29 |
1 files changed, 25 insertions, 4 deletions
diff --git a/bsp/coreip-u54mc-rtl/metal.h b/bsp/coreip-u54mc-rtl/metal.h index dab7ff4..f60e70c 100644 --- a/bsp/coreip-u54mc-rtl/metal.h +++ b/bsp/coreip-u54mc-rtl/metal.h @@ -1,7 +1,7 @@ /* Copyright 2019 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ /* ----------------------------------- */ -/* [XXXXX] 20-05-2019 14-26-11 */ +/* [XXXXX] 21-05-2019 10-54-35 */ /* ----------------------------------- */ #ifndef ASSEMBLY @@ -122,7 +122,7 @@ struct __metal_driver_riscv_cpu_intc __metal_dt_cpu_4_interrupt_controller; /* From interrupt_controller@c000000 */ struct __metal_driver_riscv_plic0 __metal_dt_interrupt_controller_c000000; -struct metal_pmp __metal_dt_pmp_0; +struct metal_pmp __metal_dt_pmp; /* From global_external_interrupts */ struct __metal_driver_sifive_global_external_interrupts0 __metal_dt_global_external_interrupts; @@ -293,6 +293,28 @@ static inline struct metal_interrupt * __metal_driver_cpu_interrupt_controller(s } } +static inline int __metal_driver_cpu_num_pmp_regions(struct metal_cpu *cpu) +{ + if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { + return 8; + } + else if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { + return 8; + } + else if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_1) { + return 8; + } + else if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_2) { + return 8; + } + else if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_3) { + return 8; + } + else { + return 0; + } +} + /* --------------------- sifive_plic0 ------------ */ @@ -912,8 +934,7 @@ struct __metal_driver_cpu *__metal_cpu_table[] = { #define __METAL_DT_INTERRUPT_CONTROLLER_C000000_HANDLE (&__metal_dt_interrupt_controller_c000000.controller) -/* From pmp@0 */ -#define __METAL_DT_PMP_HANDLE (&__metal_dt_pmp_0) +#define __METAL_DT_PMP_HANDLE (&__metal_dt_pmp) /* From global_external_interrupts */ #define __METAL_DT_SIFIVE_GLOBAL_EXINTR0_HANDLE (&__metal_dt_global_external_interrupts.irc) |