diff options
| author | Nathaniel Graff <nathaniel.graff@sifive.com> | 2019-05-31 22:10:21 +0000 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2019-05-31 22:10:21 +0000 |
| commit | f2c7f75ceef24aec9891d75c2b4fb5db5b847868 (patch) | |
| tree | c34abbfccceed1b6066ec8bce5ed6938e1762112 /bsp/coreip-u54mc-rtl | |
| parent | 3a5c06a362a39f2a41d2baa07badd38237be03e6 (diff) | |
| parent | 12fa4931834dea3c8f1dc108df3049e5b0c9a188 (diff) | |
Merge pull request #264 from sifive/u54mc-hart-0
Run U54-MC on Hart 0
Diffstat (limited to 'bsp/coreip-u54mc-rtl')
| -rw-r--r-- | bsp/coreip-u54mc-rtl/design.dts | 3 | ||||
| -rw-r--r-- | bsp/coreip-u54mc-rtl/metal.default.lds | 2 | ||||
| -rw-r--r-- | bsp/coreip-u54mc-rtl/metal.ramrodata.lds | 2 | ||||
| -rw-r--r-- | bsp/coreip-u54mc-rtl/metal.scratchpad.lds | 2 | ||||
| -rw-r--r-- | bsp/coreip-u54mc-rtl/settings.mk | 4 |
5 files changed, 5 insertions, 8 deletions
diff --git a/bsp/coreip-u54mc-rtl/design.dts b/bsp/coreip-u54mc-rtl/design.dts index 2982dd5..beba177 100644 --- a/bsp/coreip-u54mc-rtl/design.dts +++ b/bsp/coreip-u54mc-rtl/design.dts @@ -5,9 +5,6 @@ #size-cells = <2>; compatible = "SiFive,FU540G-dev", "fu540-dev", "sifive-dev"; model = "SiFive,FU540G"; - chosen { - metal,boothart = <&L13>; - }; L36: cpus { #address-cells = <1>; #size-cells = <0>; diff --git a/bsp/coreip-u54mc-rtl/metal.default.lds b/bsp/coreip-u54mc-rtl/metal.default.lds index 3949202..3b03685 100644 --- a/bsp/coreip-u54mc-rtl/metal.default.lds +++ b/bsp/coreip-u54mc-rtl/metal.default.lds @@ -27,7 +27,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; - PROVIDE(__metal_boot_hart = 1); + PROVIDE(__metal_boot_hart = 0); PROVIDE(__metal_chicken_bit = 0); diff --git a/bsp/coreip-u54mc-rtl/metal.ramrodata.lds b/bsp/coreip-u54mc-rtl/metal.ramrodata.lds index ce95071..88d7a5e 100644 --- a/bsp/coreip-u54mc-rtl/metal.ramrodata.lds +++ b/bsp/coreip-u54mc-rtl/metal.ramrodata.lds @@ -27,7 +27,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; - PROVIDE(__metal_boot_hart = 1); + PROVIDE(__metal_boot_hart = 0); PROVIDE(__metal_chicken_bit = 0); diff --git a/bsp/coreip-u54mc-rtl/metal.scratchpad.lds b/bsp/coreip-u54mc-rtl/metal.scratchpad.lds index 3949202..3b03685 100644 --- a/bsp/coreip-u54mc-rtl/metal.scratchpad.lds +++ b/bsp/coreip-u54mc-rtl/metal.scratchpad.lds @@ -27,7 +27,7 @@ SECTIONS __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; PROVIDE(__stack_size = __stack_size); __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400; - PROVIDE(__metal_boot_hart = 1); + PROVIDE(__metal_boot_hart = 0); PROVIDE(__metal_chicken_bit = 0); diff --git a/bsp/coreip-u54mc-rtl/settings.mk b/bsp/coreip-u54mc-rtl/settings.mk index 78a1ecb..cbd21b4 100644 --- a/bsp/coreip-u54mc-rtl/settings.mk +++ b/bsp/coreip-u54mc-rtl/settings.mk @@ -3,8 +3,8 @@ # ----------------------------------- # # ----------------------------------- # -RISCV_ARCH=rv64imafdc -RISCV_ABI=lp64d +RISCV_ARCH=rv64imac +RISCV_ABI=lp64 RISCV_CMODEL=medany RISCV_SERIES=sifive-5-series |