diff options
author | Palmer Dabbelt <palmer@dabbelt.com> | 2018-06-29 16:14:00 -0700 |
---|---|---|
committer | Palmer Dabbelt <palmer@dabbelt.com> | 2018-06-29 16:15:05 -0700 |
commit | 66ba2aac4875e9131a630c29cea989551ac4cabd (patch) | |
tree | 2605f4e81388a0513e742829ad932a93be1935c2 /bsp/env/coreplexip-e31-arty/platform.h | |
parent | 20541dcc0b415199bd87410aa05b8302f18edaf5 (diff) |
Add a CLIC interrupt example
This example is fairly simple, but it does at least demonstrate how to
use a C-based preemptable interrupt handler that's been registered in
CLIC mode on a SiFive E21.
Diffstat (limited to 'bsp/env/coreplexip-e31-arty/platform.h')
-rw-r--r-- | bsp/env/coreplexip-e31-arty/platform.h | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/bsp/env/coreplexip-e31-arty/platform.h b/bsp/env/coreplexip-e31-arty/platform.h index 0ac341e..6fa79ea 100644 --- a/bsp/env/coreplexip-e31-arty/platform.h +++ b/bsp/env/coreplexip-e31-arty/platform.h @@ -7,10 +7,10 @@ #if __riscv_xlen == 32 #define MCAUSE_INT 0x80000000UL -#define MCAUSE_CAUSE 0x7FFFFFFFUL +#define MCAUSE_CAUSE 0x000003FFUL #else #define MCAUSE_INT 0x8000000000000000UL -#define MCAUSE_CAUSE 0x7FFFFFFFFFFFFFFFUL +#define MCAUSE_CAUSE 0x00000000000003FFUL #endif #ifdef VECT_IRQ @@ -18,6 +18,7 @@ #else #define MTVEC_VECTORED 0x00 #endif +#define MTVEC_CLIC 0x02 #define IRQ_M_LOCAL 16 #define MIP_MLIP(x) (1 << (IRQ_M_LOCAL + x)) |