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| author | Bunnaroath Sou <35707615+bsousi5@users.noreply.github.com> | 2018-03-30 09:14:43 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2018-03-30 09:14:43 -0700 |
| commit | 20541dcc0b415199bd87410aa05b8302f18edaf5 (patch) | |
| tree | eeb4274cf573018f1d0fd3a0bdc2771995001733 /bsp/include/sifive | |
| parent | 43d1f8dc431def61296a02688e1a9eade9ddbaf7 (diff) | |
| parent | 0bf47eeddf91767a20c067003e20bc16b4a30ec3 (diff) | |
Merge pull request #89 from trabucayre/spi_fix_sckmode
bsp:devices:spi.h: fix sckmode fields value
Diffstat (limited to 'bsp/include/sifive')
| -rw-r--r-- | bsp/include/sifive/devices/spi.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/bsp/include/sifive/devices/spi.h b/bsp/include/sifive/devices/spi.h index 916d86b..80ef345 100644 --- a/bsp/include/sifive/devices/spi.h +++ b/bsp/include/sifive/devices/spi.h @@ -30,8 +30,8 @@ /* Fields */ -#define SPI_SCK_POL 0x1 -#define SPI_SCK_PHA 0x2 +#define SPI_SCK_PHA 0x1 +#define SPI_SCK_POL 0x2 #define SPI_FMT_PROTO(x) ((x) & 0x3) #define SPI_FMT_ENDIAN(x) (((x) & 0x1) << 2) |